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Semiconductor memory and method of testing semiconductor memory

  • US 20060129844A1
  • Filed: 10/31/2005
  • Published: 06/15/2006
  • Est. Priority Date: 11/18/2004
  • Status: Active Grant
First Claim
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1. A semiconductor memory, comprising:

  • an address conversion circuit configured to convert an address with no security protection to an address designating a predetermined storage region;

    a memory core having said predetermined storage region storing a check pattern; and

    a security processing circuit including at least a security release circuit or a security protection circuit, said security release circuit being configured to release an address subjected to first security protection from said first security protection, said security protection circuit being configured to provide second security protection to data sent from said memory core.

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