System and method for processing encrypted source code updates

• US 20060129846A1
• Filed: 11/30/2005
• Published: 06/15/2006
• Est. Priority Date: 12/01/2004
• Status: Active Grant

• Current Assignee: Innovation First Incorporated
• Original Assignee: Innovation First Incorporated
• Inventors: Norman, David Anthony, Lambert, Mark J.
• Granted Patent: US 7,904,706 B2
• Time in Patent Office: Days
• US Class Current: 713/191
• CPC Class Codes: G06F 21/572 Secure firmware programming, e.g. of basic input output system [BIOS]
• CPC Class Codes: G06F 8/65 Updates security arrangements therefor G06F21/57

Abstract

This disclosure provides a system and method for updating a control system using an encrypted source code update. The example control system often includes a processor for managing at least a portion of the control system and flash memory communicably coupled with the processor, with the processor operable to load an encrypted update into the flash memory. In one example, a method for updating the control system would include identifying an update for a control system with the update comprising encrypted object code and the control system comprising at least a first processor. At least the first processor is then updated based on or using the identified update.

Claims

1. A method for updating a control system comprising:

identifying an update for a control system, the update comprising encrypted object code and the control system comprising at least a first processor; and

updating at least the first processor based on the identified update.

2. The method of claim 1, wherein identifying the update comprises receiving an automatically generated notification that the update is available.

3. The method of claim 2, further comprising receiving the identified update from a client, the client capable of downloading the encrypted update from a third party.

4. The method of claim 1, further comprising:

loading the encrypted update into second memory associated with a second processor;

decrypting the update into master memory from the second memory; and

flashing at least a portion of the master memory with the updated code.

5. The method of claim 4, further comprising erasing the second memory prior to loading the encrypted update.

6. The method of claim 4, further comprising resetting the second processor after loading the encrypted update into the second memory.

7. The method of claim 4, further comprising:

communicating configuration data from the second processor to the first processor; and

erasing at least a portion of the master flash memory, the portion associated with the update based on the configuration data.

8. The method of claim 7, wherein decrypting the update into master memory comprises:

communicating a first portion of the encrypted update to the master memory from the second memory; and

decrypting the first portion of the encrypted update.

9. The method of claim 8, further comprising:

communicating a second portion of the encrypted update to the master memory from the second memory; and

decrypting the second portion of the encrypted update.

10. The method of claim 9, each portion comprising one block of memory.

11. The method of claim 9, further comprising:

writing a reset value to the master memory; and

invoking a reset of the first processor using the master memory.

12. The method of claim 4, further comprising loading second memory with customized code after decrypting the update into master memory from the second memory.

13. The method of claim 1, wherein decrypting the update into the master memory comprises decrypting the update using a multi-key algorithm.

14. A control system comprising:

a first processor for managing a least a portion of the control system;

flash master memory communicably coupled with the processor, the flash memory operable to load an encrypted update.

15. The control system of claim 14, the control system communicably coupled to a client and the update received from the client, with the client capable of downloading the encrypted update from a third party.

16. The control system of claim 14, further comprising second memory and a second processor, wherein the control system is operable to:

load the encrypted update into second memory associated a second processor;

decrypt the update into the master memory from the second memory; and

flash at least a portion of the master memory with the updated code.

17. The control system of claim 16, further operable to erase the second memory prior to loading the encrypted update.

18. The control system of claim 16, further operable to reset the second processor after loading the encrypted update into the second memory.

19. The control system of claim 16, further operable to:

communicate configuration data from the second processor to the first processor; and

erase at least a portion of the master flash memory, the portion associated with the update based on the configuration data.

20. The control system of claim 19, wherein the control system operable to decrypt the update into master memory comprises the control system operable to:

communicate a first portion of the encrypted update to the master memory from the second memory; and

decrypt the first portion of the encrypted update.

21. The control system of claim 20, further operable to:

communicate a second portion of the encrypted update to the master memory from the second memory; and

decrypt the second portion of the encrypted update.

22. The control system of claim 21, each portion comprising one block of memory.

23. The control system of claim 22, further operable to:

write reset value to the master memory; and

invoke a reset of the first processor using the master memory.

24. The control system of claim 23, further operable to load the second memory with customized code.

25. The control system of claim 23, wherein the one control system operable to decrypt the update into master memory comprises the control system operable to decrypt the update using a multi-key algorithm.

26. A control system loader comprising computer readable instructions operable when executed to:

identify an update for a control system, the update comprising encrypted object code and the control system comprising at least a first processor; and

update at least the first processor based on the identified update.

27. The control system loader of claim 26, further operable to:

load the encrypted update into second memory associated with a second processor;

decrypt the update into master memory from the second memory; and

flash at least a portion of the master memory with the updated code.

28. The control system loader of claim 27, further operable to:

communicate configuration data from the second processor to the first processor;

erase at least a portion of the master memory prior to the decryption, the portion associated with the update based on the configuration data;

write a reset value to the master memory; and

invoke a reset of the first processor using the master memory.