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Compiling method, apparatus, and program

  • US 20060129881A1
  • Filed: 11/21/2005
  • Published: 06/15/2006
  • Est. Priority Date: 11/19/2004
  • Status: Active Grant
First Claim
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1. ) An information processing apparatus having a plurality of central processors, comprising:

  • a temperature measuring section for measuring the temperature of each central processor of the plurality of central processors;

    a halt percentage calculating section for calculating a halt percentage for said each central processor from the measured temperature of said each central processor, the halt percentage being a percentage of time in which processing by said each central processor is to be being halted to the time in which electric power is being supplied to at least a part of said each central processor;

    a halt state control section implemented by a particular thread associated with said each central processor and executed in said each central processor, the halt state control section transitioning to a wait state in which the halt control section causes said each central processor to execute another thread during a predetermined wait period or a running state in which the halt control section executes an internal halt instruction to cause said each central processor to halt processing, thereby causing said each central processor to halt processing in accordance with the halt percentage;

    an interrupting section for interrupting said each central processor and causing any central processor that is halting processing to resume processing.

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