Power MOSFET driver and method therefor

• US 20060132194A1
• Filed: 12/16/2004
• Published: 06/22/2006
• Est. Priority Date: 12/16/2004
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Inventors: Harriman, Paul J.
• Granted Patent: US 7,126,388 B2
• Time in Patent Office: Days
• US Class Current: 327/108
• CPC Class Codes: H02M 7/538 in a push-pull configuration H02M7/5375 takes precedence ; with oscillating arrangements H02M7/53832, H02M7/53846
• CPC Class Codes: H03K 17/063 in field-effect transistor switches
• CPC Class Codes: H03K 2217/0036 Means reducing energy consumption

Abstract

In one embodiment, a power MOSFET driver uses two different voltages for the operating voltage of the two output drivers of the power MOSFET driver.

Claims

1. A power MOSFET driver comprising:

a first transistor driver coupled to operate from a first voltage having a first value and form a first drive signal operable to drive a first MOS transistor; and

a second transistor driver coupled to operate from a second voltage having a second value and form a second drive signal operable to drive a second MOS transistor.

2. The power MOSFET driver of claim 1 wherein the second transistor driver coupled to operate from the second voltage having the second value and form the second drive signal operable to drive the second MOS transistor includes a first voltage regulator coupled to receive the first voltage and form the second voltage.

3. The power MOSFET driver of claim 2 wherein the first voltage regulator is configured to form the second voltage responsively to enabling the second transistor driver to form a high value of the second drive signal.

4. The power MOSFET driver of claim 1 wherein the first transistor driver is configured to form a high value of the first drive signal from the first voltage.

5. The power MOSFET driver of claim 1 wherein the second transistor driver is configured to form a high value of the second drive signal from the second voltage.

6. The power MOSFET driver of claim 1 wherein the power MOSFET driver is formed in a semiconductor package having no greater than eight terminals.

7. The power MOSFET driver of claim 6 wherein the semiconductor package includes a first terminal coupled to receive the first drive signal from the first transistor driver, and a second terminal coupled to receive the second drive signal from the second transistor driver.

8. The power MOSFET driver of claim 6 further including a first voltage regulator coupled to receive the first voltage and form the second voltage wherein an output of the first voltage regulator is coupled to a third terminal of the semiconductor package.

9. The power MOSFET driver of claim 1 wherein the second voltage value is less than the first voltage value.

10. A method of forming a power MOSFET driver comprising:

configuring a first transistor driver of the power MOSFET driver to form a first drive signal having an output voltage value corresponding to a first voltage value of a first power supply; and

configuring a second transistor driver of the power MOSFET driver to form a second drive signal having an output voltage value corresponding to a second voltage value of a second power supply that is less than the first voltage value.

11. The method of claim 10 wherein configuring the second transistor driver of the power MOSFET driver to form the second drive signal having the output voltage value corresponding to the second voltage value of the second power supply that is less than the first voltage value includes configuring the second power supply to form the second voltage value at least a portion of a time that the second transistor driver is enabled to form an upper voltage value of the second drive signal.

12. The method of claim 11 wherein configuring the second power supply to form the second voltage value at least a portion of a time that the second transistor driver is enabled to form an upper voltage value of the second drive signal includes configuring the power MOSFET driver to disable the second power supply from generating the second voltage value responsively to enabling the second transistor driver to form a lower voltage value of the second drive signal.

13. The method of claim 11 wherein configuring the second power supply to form the second voltage value at least a portion of a time that the second transistor driver is enabled to form an upper voltage value of the second drive signal includes configuring the second power supply to supply current to charge a capacitor responsively to enabling the second transistor driver to form the upper voltage value of the second drive signal.

14. The method of claim 10 wherein configuring the first transistor driver of the power MOSFET driver to form the first drive signal having the output voltage value corresponding to the first voltage value of a first power supply includes configuring the first transistor driver to form a maximum value of the first drive signal corresponding to the first voltage value.

15. The method of claim 10 wherein configuring the second transistor driver of the power MOSFET driver to form the second drive signal having the output voltage value corresponding to the second voltage value includes configuring the second transistor driver to form a maximum value of the second drive signal corresponding to the second voltage value.

16. The method of claim 10 wherein configuring the second transistor driver of the power MOSFET driver to form the second drive signal having the output voltage value corresponding to the second voltage value includes configuring the power MOSFET driver to receive the first voltage value from the first power supply externally to the power MOSFET driver and to form the second voltage value from the first voltage value.

17. The method of claim 10 further including forming the power MOSFET driver in a semiconductor package having no greater than eight package terminals, coupling a voltage input terminal to receive the first voltage value, coupling an output of the first transistor driver to a first output terminal of the semiconductor package, coupling an output of the second transistor driver to a second output terminal of the semiconductor package, and coupling a voltage return of the second transistor driver to a voltage return terminal of the semiconductor package.

18. The method of claim 10 further including coupling an internal operating regulator of the power MOSFET driver to receive the first voltage value of a first power supply and form an internal operating voltage having a third voltage value.

19. A method of operating a power MOSFET driver comprising:

operating a first transistor driver of the power MOSFET driver from a first operating voltage value; and

operating a second transistor driver of the power MOSFET driver from a second operating voltage value.

20. The method of claim 19 further including operating control elements of the power MOSFET driver from a third operating voltage value.