Method and system for fast implementation of subpixel interpolation

• US 20060133506A1
• Filed: 04/01/2005
• Published: 06/22/2006
• Est. Priority Date: 12/21/2004
• Status: Active Grant

• Current Assignee: STMicroelectronics Incorporated (STMicroelectronics NV)
• Original Assignee: STMicroelectronics Incorporated (STMicroelectronics NV)
• Inventors: Dang, Philip P.
• Granted Patent: US 7,653,132 B2
• Time in Patent Office: Days
• US Class Current: 375/240.170
• CPC Class Codes: H04N 19/43 Hardware specially adapted for motion estimation or compensation
• CPC Class Codes: H04N 19/436 using parallelised computational arrangements
• CPC Class Codes: H04N 19/523 with sub-pixel accuracy

Abstract

A subpixel interpolator includes an input memory capable of storing video information formed from full pixels. The subpixel interpolator also includes at least one interpolation unit capable of performing subpixel interpolation to generate half-pixels and quarter-pixels in parallel. Multiple half-pixels and multiple quarter-pixels are generated concurrently during the subpixel interpolation. In addition, the subpixel interpolator includes an output memory capable of storing at least some of the full pixels, half-pixels, and quarter-pixels. In some embodiments, the at least one interpolation unit includes a horizontal half-pixel interpolation unit, two vertical half-pixel interpolation units, and a quarter-pixel interpolation unit, all of which may operate in parallel. In particular embodiments, the interpolation units are formed from adders and shifters and do not include any multipliers.

Claims

1. A method, comprising:

receiving video information comprising full pixels;

performing subpixel interpolation to generate half-pixels and quarter-pixels in parallel, wherein multiple half-pixels and multiple quarter-pixels are generated concurrently during the subpixel interpolation; and

performing motion compensation using at least some of the half-pixels and quarter-pixels.

2. The method of claim 1, wherein performing subpixel interpolation comprises:

generating horizontal half-pixels using at least some of the full pixels, each horizontal half-pixel located horizontally between two full pixels;

generating first vertical half-pixels using at least some of the full pixels, each first vertical half-pixel located vertically between two full pixels; and

generating second vertical half-pixels using at least some of the horizontal half-pixels, each second vertical half-pixel located vertically between two horizontal half-pixels.

3. The method of claim 2, wherein the first and second vertical half-pixels are generated concurrently.

4. The method of claim 2, wherein performing subpixel interpolation further comprises:

generating the quarter-pixels using at least some of the full pixels and half-pixels, each quarter-pixel located horizontally, vertically, or diagonally between one full pixel and one half-pixel or between two half-pixels.

5. The method of claim 1, wherein performing subpixel interpolation comprises:

generating a first set of half-pixels, a second set of half-pixels, and a third set of half-pixels;

generating a first set of quarter-pixels using the first set of half-pixels, the first set of quarter-pixels generated concurrently with the generation of the second set of half-pixels; and

generating a second set of quarter-pixels using the second set of half-pixels, the second set of quarter-pixels generated concurrently with the generation of the third set of half-pixels.

6. The method of claim 5, wherein generating the half-pixels and quarter-pixels comprises generating the half-pixels and quarter-pixels using a plurality of adders and a plurality of shifters and without using any multipliers.

7. The method of claim 1, wherein:

the video information comprises a 16×

16 macroblock; and

performing subpixel interpolation comprises concurrently generating seventeen half-pixels and forty-eight quarter-pixels, where three half-pixels and twelve quarter-pixels are generated per full pixel.

8. A subpixel interpolator, comprising:

an input memory capable of storing video information comprising full pixels;

at least one interpolation unit capable of performing subpixel interpolation to generate half-pixels and quarter-pixels in parallel, wherein multiple half-pixels and multiple quarter-pixels are generated concurrently during the subpixel interpolation; and

an output memory capable of storing at least some of the full pixels, half-pixels, and quarter-pixels.

9. The subpixel interpolator of claim 8, wherein the at least one interpolation unit comprises:

a horizontal half-pixel interpolation unit capable of generating horizontal half-pixels using at least some of the full pixels, each horizontal half-pixel located horizontally between two full pixels;

a first vertical half-pixel interpolation unit capable of generating first vertical half-pixels using at least some of the full pixels, each first vertical half-pixel located vertically between two full pixels;

a second vertical half-pixel interpolation unit capable of generating second vertical half-pixels using at least some of the horizontal half-pixels, each second vertical half-pixel located vertically between two horizontal half-pixels; and

a quarter-pixel interpolation unit capable of generating the quarter-pixels using at least some of the full pixels and half-pixels, each quarter-pixel located horizontally, vertically, or diagonally between one full pixel and one half-pixel or between two half-pixels.

10. The subpixel interpolator of claim 9, wherein each interpolation unit comprises a plurality of interpolators, each interpolator comprising:

a plurality of input registers capable of storing a plurality of pixel values; and

a plurality of adders and one or more shifters forming a multi-stage pipeline capable of processing the plurality of pixel values stored in the input registers.

11. The subpixel interpolator of claim 10, wherein the plurality of adders and one or more shifters are capable of generating a half-pixel defined by a formula of:

Half-pixel=(A−

5B+20C+20D−

5E+F+16)/32

where A, B, C, D, E, and F represent the plurality of pixel values stored in the input registers.

12. The subpixel interpolator of claim 10, wherein the plurality of adders and one or more shifters are capable of generating a quarter-pixel defined by a formula of:

Quarter-pixel=(A+B+1)/2

where A and B represent the plurality of pixel values stored in the input registers.

13. The subpixel interpolator of claim 9, further comprising:

a set of registers capable of storing a subset of the full pixels from the input memory, the set of registers also capable of providing at least some of the full pixels to the horizontal half-pixel interpolation unit and at least some of the full pixels to the second vertical half-pixel interpolation unit.

14. The subpixel interpolator of claim 13, further comprising:

an intermediate memory capable of receiving the full pixels from the set of registers and the half-pixels from the half-pixel interpolation units, the intermediate memory further capable of providing the full pixels and half-pixels to the quarter-pixel interpolation unit.

15. The subpixel interpolator of claim 14, wherein:

the input memory comprises a buffer capable of storing a 16×

16 macroblock of full pixels;

the set of registers comprises a 9×

6 set of registers;

the horizontal half-pixel interpolation unit comprises nine half-pixel interpolators;

the first vertical-pixel interpolation unit comprises four half-pixel interpolators;

the second vertical-pixel interpolation unit comprises four half-pixel interpolators;

the quarter-pixel interpolation unit comprises forty-eight quarter-pixel interpolators;

the intermediate memory comprises a buffer; and

the output memory comprises a buffer capable of storing a 64×

64 block of full pixels, half-pixels, and quarter-pixels.

16. A system, comprising:

a source of video information comprising full pixels; and

a subpixel interpolator comprising;

an input memory capable of storing the full pixels;

at least one interpolation unit capable of performing subpixel interpolation to generate half-pixels and quarter-pixels in parallel, wherein multiple half-pixels and multiple quarter-pixels are generated concurrently during the subpixel interpolation; and

an output memory capable of storing at least some of the full pixels, half-pixels, and quarter-pixels.

17. The system of claim 16, wherein the at least one interpolation unit comprises:

a horizontal half-pixel interpolation unit capable of generating horizontal half-pixels using at least some of the full pixels, each horizontal half-pixel located horizontally between two full pixels;

a first vertical half-pixel interpolation unit capable of generating first vertical half-pixels using at least some of the full pixels, each first vertical half-pixel located vertically between two full pixels;

a second vertical half-pixel interpolation unit capable of generating second vertical half-pixels using at least some of the horizontal half-pixels, each second vertical half-pixel located vertically between two horizontal half-pixels; and

a quarter-pixel interpolation unit capable of generating the quarter-pixels using at least some of the full pixels and half-pixels, each quarter-pixel located horizontally, vertically, or diagonally between one full pixel and one half-pixel or between two half-pixels.

18. The system of claim 17, wherein each interpolation unit comprises a plurality of interpolators, each interpolator comprising:

a plurality of input registers capable of storing a plurality of pixel values; and

a plurality of adders and one or more shifters forming a multi-stage pipeline capable of processing the plurality of pixel values stored in the input registers.

19. The system of claim 17, wherein the subpixel interpolator further comprises:

a set of registers capable of storing a subset of the full pixels from the input memory, the set of registers also capable of providing at least some of the full pixels to the horizontal half-pixel interpolation unit and at least some of the full pixels to the second vertical half-pixel interpolation unit.

20. The system of claim 16, wherein:

the source of video information comprises a deblocking filter in one of;

a video encoder and a video decoder; and

the video encoder or video decoder further comprises;

an inverse quantization/transform unit capable of receiving quantized discrete cosine transform (DCT) coefficients and performing inverse quantization and inverse DCT transform functions using the DCT coefficients to produce a first signal;

a combiner capable of combining the first signal with a second signal to produce the video information comprising the full pixels and providing the video information to the deblocking filter; and

a motion compensator capable of receiving motion vectors and the half-pixels and quarter-pixels, the motion compensator also capable of generating the second signal.