Flexible hybrid structure tunable for different telecom market solutions

• US 20060133600A1
• Filed: 12/01/2005
• Published: 06/22/2006
• Est. Priority Date: 12/03/2004
• Status: Abandoned Application

• Current Assignee: Silicon Laboratories Incorporated
• Original Assignee: Integration Associates, Inc. (Silicon Laboratories Incorporated)
• Inventors: Holcombe, Wayne T.
• Application Number:
  US11/291,717
• Publication Number:
  US 20060133600A1
• Time in Patent Office: Days
• US Class Current: 379/406.80
• CPC Class Codes: H04B 1/58 Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa
• CPC Class Codes: H04B 3/03 Hybrid circuits for transceivers H04B1/52, H04B1/58

Abstract

A hybrid circuit for use with a transformer includes a differential transmit amplifier having first and second input terminals for receiving a signal to be transmitted and a pair of output terminals that may be coupled to the transformer. The hybrid circuit also includes a summing node receive amplifier having an input terminal that may be coupled to the transformer and an output terminal that is accessible external to the hybrid circuit. The differential transformer provides for improved transmit amplitude when a low supply voltage is used. The externally accessible output of the summing node receive amplifier provides for adjustment of the receive gain to improve dynamic range and for tuning of the hybrid for different circuit requirements.

Claims

1. A hybrid circuit for use with a transformer, the circuit comprising:

an integrated circuit having first, second, third and fourth external interface pins;

a summing node receive amplifier having a first input terminal coupled to the first external interface pin, a second input terminal coupled to a power supply source, and an output coupled to the second external interface pin, such that the summing node receive amplifier may be coupled to the transformer and a gain and impedance of the summing node receive amplifier may be determined using external components;

a differential transmit amplifier having first and second input terminals for receiving a signal to be transmitted, a first output terminal coupled to the third external interface pin, and a second output terminal coupled to the fourth external interface pin, such that the differential transmit amplifier may be coupled to the transformer and to the receive amplifier.

2. The circuit of claim 1, the circuit further comprising:

a first external resistor electrically coupled between a first terminal of the transformer and the first external interface pin (rxi);

a second external resistor electrically coupled between a second terminal of the transformer and the second external interface pin (rxo);

a third external resistor electrically coupled between the first terminal of the transformer and the third external interface pin (txa); and

a conductor electrically coupled between the second terminal of the transformer and the fourth external interface pin (txb).

3. The circuit of claim 2, the circuit further comprising:

a first external capacitor coupled between the second terminal of the transformer and the second external interface pin in parallel with the second external resistor to form an anti-aliasing filter.

4. The circuit of claim 3, the circuit further comprising a second external capacitor electrically coupled between the first terminal of the transformer and the third external interface pin.

5. The circuit of claim 4, the circuit further comprising:

a fourth external resistor electrically coupled to a power supply terminal;

a third external capacitor electrically coupled between the fourth external resistor and the first external interface pin; and

a fourth external capacitor electrically coupled between the fourth external resistor and the fourth external interface pin.

6. A method for providing a hybrid circuit for use with a transformer, the method comprising the steps of:

fabricating a summing node receive amplifier in an integrated circuit, where the summing node receiver has an input terminal and an output terminal accessible external to the integrated circuit;

fabricating a differential transmit amplifier in the integrated circuit, where the transmit amplifier has first and second output terminals that are accessible external to the integrated circuit;

coupling the summing node receive amplifier and differential transmit amplifier to the transformer using external discrete circuit elements.

7. The method of claim 6, where the step of coupling the summing node receive amplifier and differential transmit amplifier to the transformer using external discrete circuit elements further comprises:

determining a gain and impedance of the summing node receive amplifier using the external discrete circuit elements.

8. The method of claim 6, where the step of coupling the summing node receive amplifier and differential transmit amplifier to the transformer using external discrete circuit elements further comprises:

attenuating a transmit to receive echo using the external discrete circuit elements.

9. The method of claim 6, where the step of coupling the summing node receive amplifier and differential transmit amplifier to the transformer using external discrete circuit elements further comprises:

matching a complex line impedance using external discrete circuit elements coupled between the summing node receive amplifier and the transmit amplifier.

10. The method of claim 6, where the step of coupling the summing node receive amplifier and differential transmit amplifier to the transformer using external discrete circuit elements further comprises:

providing a complex domain impedance termination for a telephone line pair coupled to the transformer using the external discrete circuit elements.