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Method and apparatus for scheduling multiple threads for execution in a shared microprocessor pipeline

  • US 20060136915A1
  • Filed: 12/17/2004
  • Published: 06/22/2006
  • Est. Priority Date: 12/17/2004
  • Status: Active Grant
First Claim
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1. A multithreaded processor comprising:

  • an instruction buffer for storing instructions for a plurality of threads;

    at least one processor core for executing instructions stored in the instruction buffer; and

    a scheduler for selecting which of the plurality of threads will have an instruction scheduled for execution by monitoring a current thread state for each of the plurality of threads to determine whether each thread is ready to be scheduled for execution, whether each thread is currently executing and what condition is preventing each thread from executing, where the scheduler selects a first thread having a current thread state indicating that the first thread was least recently scheduled.

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