Method and apparatus to improve frequency stability of an integrated circuit oscillator

• US 20060139111A1
• Filed: 02/23/2006
• Published: 06/29/2006
• Est. Priority Date: 11/19/2003
• Status: Active Grant

• Current Assignee: Giao Minh Pham
• Original Assignee: Giao Minh Pham
• Inventors: Pham, Giao Minh
• Granted Patent: US 7,304,547 B2
• Time in Patent Office: Days
• US Class Current: 331/36.C
• CPC Class Codes: H03K 3/011 Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature to maintain energy constant H03K3/015
• CPC Class Codes: H03K 3/0231 Astable circuits H03K3/0315 takes precedence
• CPC Class Codes: H03K 4/502 the capacitor being charged from a constant-current source

Abstract

An apparatus providing a simple low cost integrated circuit oscillator with improved frequency stability over a range of selected frequencies by reducing the impact of process and temperature variations on a base current of bipolar transistor of the integrated circuit oscillator. A circuit includes a capacitor coupled to be alternatingly charged and discharged by first and second current sources. A first voltage follower circuit including a first bipolar transistor having a base is coupled to the capacitor. The first bipolar transistor is biased such that a voltage at an emitter of the first bipolar transistor follows a voltage on the capacitor. A current mirror having first and second current paths is included. The first current path is coupled to the base of the first bipolar transistor. The first current path provides substantially all of a base current received by the base of the first bipolar transistor. A second voltage follower circuit including a second bipolar transistor having a base coupled to the second current path is included. The second current path provides substantially all of a base current received by the base of the second bipolar transistor.

Claims

1. A circuit, comprising:

a capacitor coupled to be alternatingly charged and discharged by first and second current sources;

a first voltage follower circuit including a first bipolar transistor having a base coupled to the capacitor, the first bipolar transistor biased such that a voltage at an emitter of the first bipolar transistor follows a voltage on the capacitor;

a current mirror having first and second current paths, the first current path coupled to the base of the first bipolar transistor, the first current path providing substantially all of a base current received by the base of the first bipolar transistor; and

a second voltage follower circuit including a second bipolar transistor having a base coupled to the second current path, the second current path providing substantially all of a base current received by the base of the second bipolar transistor.

2. The circuit of claim 1 wherein the base current received by the base of the first bipolar transistor includes substantially zero current received from the capacitor.

3. The circuit of claim 1 wherein the first and second bipolar transistors are substantially matched in current density.

4. The circuit of claim 1 further comprising first and second bias current sources, the first bias current source coupled to the emitter of the first bipolar transistor and the second bias current source coupled to an emitter of the second bipolar transistor.

5. The circuit of claim 1 further comprising a switch coupled between the second current source and the capacitor, the switched coupled to be alternatingly opened and closed such that when the switch is opened, the first current source is coupled to charge the capacitor and when the switch is closed, the first and second current sources are coupled to discharge the capacitor.

6. The circuit of claim 5 wherein the switch is coupled to be opened until the voltage on the capacitor is charged to a first threshold and wherein the switch is coupled to be closed until the voltage on the capacitor is discharged to a second threshold.

7. The circuit of claim 6 further comprising a comparator coupled to receive the voltage at the emitter of the first bipolar transistor, an output of the comparator coupled to control the switch.

8. The circuit of claim 1 wherein a ratio of currents provided by the first and second current sources is substantially fixed to provide a substantially fixed duty ratio of an oscillating voltage provided on the capacitor.

9. The circuit of claim 1 wherein a ratio of currents provided by the first and second current sources is variable to adjust a duty ratio of an oscillating voltage provided on the capacitor.

10. The circuit of claim 1 wherein magnitudes of currents provided by the first and second current sources are substantially fixed to provide a substantially fixed frequency of an oscillating voltage provided on the capacitor

11. The circuit of claim 1 wherein magnitudes of currents provided by the first and second current sources are variable to adjust a frequency of an oscillating voltage provided on the capacitor.