CYCLIC DIGITAL TO ANALOG CONVERTER

• US 20060139195A1
• Filed: 12/29/2004
• Published: 06/29/2006
• Est. Priority Date: 12/29/2004
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Casper, Bryan K., Petrie, Craig S.
• Granted Patent: US 7,199,743 B2
• Time in Patent Office: Days
• US Class Current: 341/144
• CPC Class Codes: H03M 1/667 Recirculation type

Abstract

A digital to analog converter (DAC) circuit operates least significant bit (LSB) first.

Claims

1. A digital to analog converter comprising:

an amplifier;

a first capacitor coupled to an input node of the amplifier;

a second capacitor coupled between the input node of the amplifier and an output node of the amplifier, wherein the second capacitor has a capacitance value substantially twice a capacitance value of the first capacitor; and

at least one switching element coupled to the first capacitor, wherein the switching element is coupled to be responsive to a least-significant-bit first sequence of digital bits in a digital word.

2. The digital to analog converter of claim 1 wherein the amplifier comprises an operational amplifier.

3. The digital to analog converter of claim 1 further comprising a conditional feedback path coupled between the output of the amplifier and the first capacitor.

4. The digital to analog converter of claim 3 wherein the conditional feedback path has a gain of substantially −

1.

5. The digital to analog converter of claim 1 wherein the at least one switching element is coupled to to apply a reference voltage to the first capacitor.

6. The digital to analog converter of claim 5 wherein the at least one switching element includes a first switching element coupled to conditionally apply a positive reference voltage to the first capacitor, and a second switching element coupled to conditionally apply a negative reference voltage to the first capacitor.

7. A digital to analog converter comprising.

an operational amplifier configured as an integrator with a feedback capacitor of 2C where C is a capacitance value;

an input capacitor of substantially C; and

switching circuitry to successively impose one of two reference voltages in response to a digital code word applied least-significant-bit first.

9. The digital to analog converter of claim 7 wherein the switching circuitry is coupled to apply a positive reference voltage to the input capacitor when an applied bit of the digital code word has a first value, and to apply a negative reference voltage to the input capacitor when the applied bit of the digital code word has a second value.

10. The digital to analog converter of claim 7 further comprising a feedback amplifier to feed back an output voltage to the input capacitor when when neither of the two reference voltages is imposed.

12. The digital to analog converter of claim 7 further comprising a unity gain feedback amplifier.

8. (canceled)

11. (canceled)

13. A method comprising:

applying a reference voltage to an input capacitor of a cyclic digital to analog converter in response to a least significant bit of a digital word;

integrating the reference voltage to create an output voltage substantially equal to negative one half of the reference voltage;

feeding back the output voltage to the input capacitor; and

repeating the applying, integrating, and feeding back operations for remaining bits of the digital word applied from least-significant-bit to most-significant-bit.

14. The method of claim 13 wherein applying a reference voltage comprises applying a first reference voltage when the least significant bit has a first value, and applying a second reference voltage when the least significant bit has a second value.

16. The method of claim 13 wherein integrating the reference voltage comprises integrating the reference voltage with an operational amplifier having capacitive feedback.

15. (canceled)

17. An electronic system comprising:

an antenna; and

an integrated circuit to operate on signals received by the antenna, the integrated circuit including a port circuit having a digital to analog converter that includes an amplifier, a first capacitor coupled to an input node of the amplifier, a second capacitor coupled between the input node of the amplifier and an output node of the amplifier, wherein the second capacitor has a capacitance value substantially twice a capacitance value of the first capacitor, and at least one switching element coupled to the first capacitor, wherein the switching element is coupled to be responsive to a least-significant-bit first sequence of digital bits in a digital word.

18. The electronic system of claim 17 wherein the amplifier comprises an operational amplifier.

19. The electronic system of claim 17 further comprising a negative unity gain feedback path coupled between the output of the amplifier and the first capacitor.

20. The electronic system of claim 19 wherein the amplifier comprises a differential amplifier, and the negative unit gain feedback path includes switches to conditionally couple output nodes to input nodes with opposite polarity.