System and method for fault indication on a substrate in maskless applications

• US 20060142967A1
• Filed: 12/28/2004
• Published: 06/29/2006
• Est. Priority Date: 12/28/2004
• Status: Active Grant

• Current Assignee: ASML Netherlands BV (ASML Holding NV)
• Original Assignee: ASML Netherlands BV (ASML Holding NV)
• Inventors: Hoeks, Martinus
• Granted Patent: US 7,403,865 B2
• Time in Patent Office: Days
• US Class Current: 702/117
• CPC Class Codes: G03F 7/70291 Addressable masks, e.g. spatial light modulators [SLMs], digital micro-mirror devices [DMDs] or liquid crystal display [LCD] patterning devices
• CPC Class Codes: G03F 7/70508 Data handling in all parts of the microlithographic apparatus, e.g. handling pattern data for addressable masks or data transfer to or from different components within the exposure apparatus
• CPC Class Codes: G03F 7/70541 Tagging, i.e. hardware or software tagging of features or components, e.g. using tagging scripts or tagging identifier codes for identification of chips, shots or wafers
• CPC Class Codes: G03F 7/70616 Monitoring the printed patterns

Abstract

A method and system for fault indication on a substrate. A method of the present invention includes the following steps. It is determined whether data includes at least one suspicious bit. A pattern generator is controlled with the data. A beam of radiation is patterned using the pattern generator. Features in the patterned beam of radiation are projected onto a target portion of a substrate. One or more markers in the patterned beam are projected onto the substrate indicating the target portions that correspond with the at least one suspicious bit.

Claims

1. A method for indicating fault on a substrate, comprising:

(a) determining whether data includes at least one suspicious bit;

(b) controlling a pattern generator with the data;

(c) patterning a beam of radiation using the pattern generator;

(d) projecting features in the patterned beam of radiation onto a target portion of a substrate; and

(e) projecting one or more markers in the patterned beam onto the substrate indicating the target portions that correspond with the at least one suspicious bit as determined in step (a).

2. The method of claim 1, wherein step (a) comprises:

using an error detection algorithm to determine whether the data includes at least one suspicious bit.

3. The method of claim 1, wherein step (a) comprises:

comparing an error criterion to the data.

4. The method of claim 3, wherein the error criterion comprises:

determining that at least one suspicious bit does not exist if one or more least significant bits of a digital binary number is a 1; and

determining that at least one suspicious bit exists if one or more most significant bits of the digital binary number is a 1.

5. The method of claim 3, further comprising:

manually inputting the error criterion.

6. The method of claim 1, wherein the substrate comprises a flat panel display, and wherein the marker acts as coordinates of at least one suspicious portion of the flat panel display corresponding to the at least one suspicious bit.

7. The method of claim 1, further comprising:

inspecting areas of the substrate that include the one or more markers to determine if the features associated with the one or more markers are within predetermined specifications.

8. The method of claim 1, wherein the substrate comprises at least one of a semiconductor substrate, a flat panel display substrate, and a polymer substrate.

9. A system, comprising:

a control module that detects whether data includes at least one suspicious bit and generates suspicious bit information;

a pattern generator that patterns a beam of radiation, wherein the data and the suspicious bit information are used to control the pattern generator; and

a projection system that projects the patterned beam of radiation, including one or more markers associated with the suspicious bit information, onto a target portion of a substrate.

14. The system of claim 9, wherein the one or more markers act as a coordinate or coordinates on the substrate of the at least one suspicious bit.

15. The system of claim 9, further comprising:

an inspection system that inspects potential problem areas of the substrate marked by the one or markers to determine if a pattern on the substrate associated with the one or more markers is within predetermined specifications.

16. The system of claim 9, wherein the substrate comprises at least one of a semiconductor substrate, a glass substrate, and a polymer substrate.

10. A system, comprising:

a control module that detects whether data includes at least one suspicious bit and generates suspicious bit information;

a pattern generator that patterns a beam of radiation, wherein the data and the suspicious bit information are used to control the pattern generator; and

a projection system that projects the patterned beam of radiation onto a target portion of a substrate;

a memory that stores the data and any suspicious bit information relating to the at least one suspicious bit; and

a rasterizer that sends the data and any suspicious bit information to the pattern generator.

11. (canceled)

12. (canceled)

13. A system, comprising:

an input device for inputting an error criterion;

a detector that compares the error criterion to data to determine if at least one suspicious bit exists in the data;

a pattern generator that patterns a beam of radiation, wherein the data and the suspicious bit information are used to control the pattern generator; and

a projection system that projects the patterned beam of radiation onto a target portion of a substrate.