Power savings in a voltage supply controlled according to a work capability operating mode of an integrated circuit

• US 20060146467A1
• Filed: 03/01/2006
• Published: 07/06/2006
• Est. Priority Date: 06/24/2002
• Status: Active Grant

• Current Assignee: Don J. Nguyen, Helen H. Ruan
• Original Assignee: Don J. Nguyen, Helen H. Ruan
• Inventors: Nguyen, Don J., Ruan, Helen H.
• Granted Patent: US 7,543,164 B2
• Time in Patent Office: Days
• US Class Current: 361/103
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/3296 by lowering the supply or operating voltage
• CPC Class Codes: H02J 9/002 in which a reserve is maintained in an energy source by disconnecting non-critical loads, e.g. maintaining a reserve of charge in a vehicle battery for starting an engine
• CPC Class Codes: H02M 1/0032 Control circuits allowing low power mode operation, e.g. in standby mode
• CPC Class Codes: H02M 3/1588 comprising at least one synchronous rectifier element H02M3/1582, H02M3/1584 take precedence
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Power is applied to a voltage supply. A signal that indicates reduced work capability in an integrated circuit (IC) that is being powered by the voltage supply is generated based on workload demand or conscious power and performance tradeoffs. This signal is applied to increase the power efficiency of the voltage supply, while the supply is powering the IC in its reduced work capability state.

Claims

1. A method comprising:

generating a first signal that indicates a state of reduced work capability in an integrated circuit (IC) that is being powered by a switching voltage supply; and

applying the first signal to increase the power efficiency of the switching voltage supply while the supply is powering the IC in the reduced work capability state.

2. The method of claim 1 wherein the first signal is generated by a processor die.

3. The method of claim 2 wherein the first signal is generated by a system chipset.

4. The method of claim 1 wherein the IC is placed into the state of reduced work capability because one of (1) a thermal overload condition is approaching, (2) a battery is near depletion, and (3) the IC is idle.

5. The method of claim 1 wherein the increase in power efficiency of the switching voltage supply is performed without substantially changing an input supply voltage of the IC.