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Clock simulation system and method

  • US 20060149526A1
  • Filed: 12/20/2005
  • Published: 07/06/2006
  • Est. Priority Date: 12/30/2004
  • Status: Active Grant
First Claim
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1. A method of simulating a digital circuit operating with one or more clock signals, a clock signal being a signal having one or more attributes that provide for determining the time of the next clock signal driven event, the method comprising:

  • forming a hardware model representing the circuit;

    scheduling one or more time-scheduled events according to the model, the scheduling in a time-scheduled event data structure, a time-scheduled event being an event whose occurrence time in a simulation time frame is defined by reference to a simulation time;

    scheduling one or more clock-scheduled events according to the model, a clock-scheduled event being an event whose occurrence time is defined relative to one or more attributes of at least one clock signal in the circuit;

    predicting the occurrence time of the clock-scheduled events; and

    at any particular simulation time, processing the time-scheduled events for the particular simulation time and clock-scheduled events predicted to occur at the particular simulation time;

    such that clocked-scheduled events are distinguishable from time-scheduled events, and such that each and every transition of any clock signal need not be scheduled in the time-scheduled event data structure.

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