Positioning signal receiving apparatus

• US 20060149984A1
• Filed: 12/19/2005
• Published: 07/06/2006
• Est. Priority Date: 12/20/2004
• Status: Active Grant

• Current Assignee: Furuno Electric Co, Ltd
• Original Assignee: Furuno Electric Co, Ltd
• Inventors: Yasumoto, Takuji
• Granted Patent: US 7,500,125 B2
• Time in Patent Office: Days
• US Class Current: 713/322
• CPC Class Codes: G01S 19/23 Testing, monitoring, correcting or calibrating of receiver elements
• CPC Class Codes: G01S 19/34 Power consumption
• CPC Class Codes: G06F 1/04 Generating or distributing clock signals or signals derived directly therefrom
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/324 by lowering clock frequency
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management
• CPC Class Codes: Y02D 30/50 in wire-line communication networks, e.g. low power modes or reduced link rate

Abstract

A GPS receiver is alternately switched between sleep conditions under which between sleep conditions under which a temperature-compensated crystal oscillator is shut off for a specific sleep time while a real-time clock section is kept operational and normal operating conditions under which both the temperature-compensated crystal oscillator and the real-time clock section are kept operational. The GPS receiver determines the ratio of the number of pulses of a reference clock signal to the number of pulses of a low-frequency clock signal counted during a specific period of time preceding the sleep time. The GPS receiver estimates a count value which should have been reached by a reference clock counter at the end of the sleep time if the temperature-compensated crystal oscillator continuously generated the reference clock signal based on the number of pulses of the low-frequency clock signal counted during the sleep time.

Claims

1. A positioning signal receiving apparatus comprising:

a reference clock signal generator for generating a first clock signal used as a reference clock signal in processing a positioning signal;

a reference clock counter for counting successive pulses of the first clock signal;

a low-frequency clock signal generator for supplying a second clock signal generated independently of the first clock signal, the second clock signal having a lower frequency than the first clock signal;

a positioning signal receiving section for receiving said positioning signal;

a positioning signal processor for establishing a position fix by processing the positioning signal;

an intermittent operation controller for alternately switching said positioning signal receiving apparatus between sleep conditions under which said reference clock signal generator is shut off for a specific sleep time while said low-frequency clock signal generator is kept operational and normal operating conditions under which both said reference clock signal generator and said low-frequency clock signal generator are kept operational;

a count ratio determiner for determining the ratio of the number of pulses of the first clock signal to the number of pulses of the second clock signal counted during a specific period of time preceding the sleep time; and

a reference clock count value interpolator for calculating the number of pulses of the first clock signal which should have been counted during the sleep time if said reference clock signal generator continuously generated the first clock signal from the number of pulses of the second clock signal counted during the sleep time and estimating a count value which should have been reached by said reference clock counter at the end of the sleep time by using the number of pulses of the first clock signal which should have been counted during the sleep time.

2. The positioning signal receiving apparatus according to claim 1, wherein said specific period of time during which the number of pulses of the first clock signal and the number of pulses of the second clock signal are counted immediately precedes the sleep time, and said reference clock count value interpolator obtains the number of pulses of the first clock signal which should have been counted during the sleep time if said reference clock signal generator continuously generated the first clock signal by multiplying the number of pulses of the second clock signal counted during the sleep time by the ratio of the number of pulses of the first clock signal to the number of pulses of the second clock signal counted during said specific period of time.

3. The positioning signal receiving apparatus according to claim 1 or 2 further comprising a reference clock count value corrector for estimating a code phase of the positioning signal corresponding to a calculated range from a satellite transmitting the positioning signal to a point of signal reception based on time kept by said positioning signal receiving apparatus corresponding to the count value of said reference clock counter and orbit information contained in the positioning signal, calculating deviation of the estimated code phase from a code phase derived from observation of the positioning signal, and correcting the count value of said reference clock counter by as much as the amount of offset corresponding to the deviation of the estimated code phase upon restoration of normal operating conditions from sleep conditions.

4. The positioning signal receiving apparatus according to claim 1 or 2, wherein said positioning signal processor includes a position fixing section for establishing the position fix by processing positioning signals received from a plurality of satellites and determining time in a geodetic datum in which said positioning signal receiving apparatus is located, said positioning signal receiving apparatus further comprising a reference clock count value corrector for calculating deviation of time kept by said positioning signal receiving apparatus corresponding to the count value of said reference clock counter from the time in the geodetic datum determined by said position fixing section, and correcting the count value of said reference clock counter by as much as the amount of offset corresponding to the deviation of the time kept by said positioning signal receiving apparatus upon restoration of normal operating conditions from sleep conditions.

5. The positioning signal receiving apparatus according to one of claims 1 to 2 further comprising a control command receiving section which includes a serial input port for receiving a control command transmitted from an external device, wherein said control command receiving section executes a sequence of bringing said reference clock signal generator back to normal operating conditions upon detecting a start bit of the control command and becomes ready to receive a meaningful control code contained in the control command upon completion of the sequence of bringing said reference clock signal generator back to normal operating conditions, and wherein the meaningful control code is contained in a bit string which follows a specific number of bits from the beginning of the control command.

6. A method of recovering a clock signal used within a positioning receiver, comprising:

determining a relationship between a first clock signal and a second clock signal;

establishing a prior count value associated with the first clock signal when the first clock signal enters a non-operational state; and

estimating new count value of the first clock signal upon re-entering an operational state, based upon the relationship and the prior count value.

7. The method of claim 6, wherein the determining is based upon measured characteristics obtained during the normal operation of the first clock signal and the second clock signal.

8. The method of claim 7, wherein the determining further comprises:

counting, over a predetermined period of time, a first number of pulses corresponding to the first clock signal;

counting, over the predetermined period of time, a second number of pulses corresponding to the second clock signal; and

calculating a ratio of the first number of pulses to the second number of pulses.

9. The method of claim 6, wherein the determining is based upon predefined, stored characteristics of the first and second clock signals.

10. The method of claim 8, wherein the estimating further comprises:

calculating a third number of pulses, corresponding to the second clock signal, which elapse over a sleep time;

multiplying the third number of pulses by the ratio;

adding the multiplied value to the prior count value associated with the first clock signal.

11. The method of claim 10, wherein the sleep time is a duration of time starting at the entry of first clock signal into the non operational state, and ending at the re-entry of the first clock signal into the operational state.

12. The method of claim 6, wherein the first clock signal oscillates at a frequency in the mega-Hertz region.

13. The method of claim 6, wherein the second clock signal oscillates at a frequency in the kilo-Hertz region.