Resistor material with metal component for use in circuitized substrates, circuitized substrate utilizing same, method of making said ciruitized substrate, and information handling system utilizing said ciruitized substrate

• US 20060151202A1
• Filed: 07/05/2005
• Published: 07/13/2006
• Est. Priority Date: 01/10/2005
• Status: Active Grant

• Current Assignee: I3 ELECTRONICS, INC.
• Original Assignee: Endicott Interconnect Technologies Incorporated
• Inventors: Lauffer, John M., Markovich, Voya R., Das, Rabindra N.
• Granted Patent: US 7,235,745 B2
• Time in Patent Office: Days
• US Class Current: 174/256
• CPC Class Codes: H01G 4/206 inorganic and synthetic material
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/73253 Bump and layer connectors
• CPC Class Codes: H01L 2924/00011 Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/0102 Calcium [Ca]
• CPC Class Codes: H01L 2924/01025 Manganese [Mn]
• CPC Class Codes: H01L 2924/01046 Palladium [Pd]
• CPC Class Codes: H01L 2924/01057 Lanthanum [La]
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/01087 Francium [Fr]
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/16195 Flat cap [not enclosing an internal cavity]
• CPC Class Codes: H01L 2924/3011 Impedance
• CPC Class Codes: H05K 1/095 for polymer thick films, i.e. having a permanent organic polymeric binder
• CPC Class Codes: H05K 1/162 incorporating printed capacitors
• CPC Class Codes: H05K 1/167 : incorporating printed resistors
• CPC Class Codes: H05K 2201/0187 : with regions of different dielectrics in the same layer, e.g. in a printed capacitor for locally changing the dielectric properties
• CPC Class Codes: H05K 2201/0209 : Inorganic, non-metallic particles
• CPC Class Codes: H05K 2201/0215 : Metallic fillers
• CPC Class Codes: H05K 2201/0257 : Nanoparticles
• CPC Class Codes: H05K 2203/1453 : Applying the circuit pattern before another process, e.g. before filling of vias with conductive paste, before making printed resistors
• CPC Class Codes: H05K 3/0023 : by exposure and development of a photosensitive insulating layer
• CPC Class Codes: Y10T 29/49082 : Resistor making
• CPC Class Codes: Y10T 29/49087 : with envelope or housing
• CPC Class Codes: Y10T 29/49089 : Filling with powdered insulation
• CPC Class Codes: Y10T 29/49091 : with direct compression of powdered insulation
• CPC Class Codes: Y10T 29/4913 : Assembling to base an electrical component, e.g., capacitor, etc.
• CPC Class Codes: Y10T 29/49155 : Manufacturing circuit on or in base
• CPC Class Codes: Y10T 29/49165 : by forming conductive walled aperture in base

Abstract

A material for use as part of an internal resistor within a circuitized substrate includes a polymer resin and a quantity of nano-powders including a mixture of at least one metal component and at least one ceramic component. The ceramic component may be a ferroelectric ceramic and/or a high surface area ceramic and/or a transparent oxide and/or a dope manganite. Alternatively, the material will include the polymer resin and nano-powders, with the nano-powders comprising at least one metal coated ceramic and/or at least one oxide coated metal component. A circuitized substrate adapted for using such a material and resistor therein and a method of making such a substrate are also provided. An electrical assembly (substrate and at least one electrical component) and an information handling system (e.g., personal computer) are also provided.

Claims

1. A method of making a circuitized substrate having circuitry including a resistor as part thereof, said method comprising:

providing a dielectric layer;

forming first and second electrical conductors on said dielectric layer; and

positioning a quantity of material on said dielectric layer between and in contact with said first and second electrical conductors to form a circuit line of said circuitry, said quantity of material including a polymer resin and a quantity of nano-powders including a mixture of at least one metal component and at least one ceramic component.

2. The method of claim 1 wherein said first and second electrical conductors are formed using photolithographic processing.

3. The method of claim 1 wherein said first and second electrical conductors are formed using a sputtering operation.

4. The method of claim 1 wherein said positioning of said quantity of material on said dielectric layer between and in contact with said first and second electrical conductors to form a circuit line of said circuitry is accomplished using screen printing.

5. The method of claim 1 wherein said positioning of said quantity of material on said dielectric layer between and in contact with said first and second electrical conductors to form a circuit line of said circuitry is accomplished using stencil printing.

6. The method of claim 1 further including bonding at least one additional dielectric layer on said first dielectric layer and at least one additional electrical conductor on said at least one additional dielectric layer, and electrically coupling said at least one additional electrical conductor to said circuit line of said circuitry.

7. The method of claim 6 further including forming a thru-hole within said at least one additional dielectric layer, said thru-hole providing said coupling of said at least one additional electrical conductor to said circuit line of said circuitry.

8. The method of claim 7 further including positioning a quantity of said material within said thru-hole in contact with said at least one additional electrical conductor and said circuit line of said circuitry.

9. A method of making a circuitized substrate having circuitry including a resistor as part thereof, said method comprising:

providing a dielectric layer having first and second opposite sides and at least one opening therein;

forming first and second electrical conductors on said first and second opposite sides of said dielectric layer, respectively; and

positioning a quantity of material within said at least one opening and in contact with said first and second electrical conductors to form a circuit line of said circuitry, said quantity of material including a polymer resin and a quantity of nano-powders including a mixture of at least one metal component and at least one ceramic component.

10. A circuitized substrate comprising:

a first dielectric layer;

first and second electrical conductors spacedly positioned on said first dielectric layer; and

a quantity of material on said first dielectric layer in contact with said first and second electrical conductors, said quantity of material including a polymer resin and a quantity of nano-powders including a mixture of at least one metal component and at least one ceramic component.

11. The circuitized substrate of claim 10 wherein said first dielectric layer comprises an organic dielectric material selected from the group of polymer materials consisting of fiberglass-reinforced epoxy resins, polytetrafluoroethylene, polyimides, polyamides, cyanate resins, polyphenylene ether resins, photo-imageable materials, and combinations thereof.

12. The circuitized substrate of claim 10 wherein said first and second electrical conductors are each comprised of copper or copper alloy material.

13. The circuitized substrate of claim 10 further including additional dielectric and electrically conductive layers on opposite sides of said first dielectric layer, selected ones of said electrically conductive layers being electrically coupled to said circuit line.

14. The circuitized substrate of claim 10 wherein said at least one ceramic component comprises a ferroelectric ceramic, said nano-particles of said ferroelectric ceramic component having a particle size substantially within the range of from about 0.01 microns to about 0.9 microns and a surface area within the range of from about 2.0 to about 20 square meters per gram.

15. The circuitized substrate of claim 14 wherein said nano-powders further include at least one carbon nanotube component.

16. The circuitized substrate of claim 10 wherein said at least one ceramic component comprises a high surface area ceramic, said nano-particles of said high surface area ceramic having a particle size substantially within the range of from about 0.01 microns to about 10 microns and a surface area within the range of from about 1.0 to about 1500 square meters per gram.

17. The circuitized substrate of claim 16 wherein said nano-powders further include at least one carbon nanotube component.

18. The circuitized substrate of claim 10 wherein said at least one ceramic component comprises a transparent oxide.

19. The circuitized substrate of claim 10 wherein said at least one ceramic component comprises a doped manganite.

20. A circuitized substrate comprising:

a first dielectric layer;

first and second electrical conductors spacedly positioned on said first dielectric layer; and

a quantity of material on said first dielectric layer in contact with said first and second electrical conductors, said quantity of material including a polymer resin and a quantity of nano-powders including at least one metal coated ceramic component.

21. The circuitized substrate of claim 20 wherein said nano-particles of said at least one metal coated ceramic component include a particle size substantially within the range of from about 0.01 microns to about 10 microns.

22. A circuitized substrate comprising:

a first dielectric layer;

first and second electrical conductors spacedly positioned on said first dielectric layer; and

a quantity of material on said first dielectric layer in contact with said first and second electrical conductors, said quantity of material including a polymer resin and a quantity of nano-powders including at least one oxide coated metal component.

23. The circuitized substrate of claim 22 wherein said nano-particles of said at least one oxide coated metal component include a particle size substantially within the range of from about 0.01 microns to about 10 microns.

24. A circuitized substrate comprising:

a first dielectric layer including first and second opposite sides and an opening therein;

first and second electrical conductors positioned on said first and second sides of said first dielectric layer, respectively; and

a quantity of material within said opening and in contact with said first and second electrical conductors, said quantity of material including a polymer resin and a quantity of nano-powders including a mixture of at least one metal component and at least one ceramic component.

25. An electrical assembly comprising:

a circuitized substrate including a first dielectric layer, first and second electrical conductors spacedly positioned on said first dielectric layer, a quantity of material on said first dielectric layer in contact with said first and second electrical conductors, said quantity of material including a polymer resin and a quantity of nano-powders including a mixture of at least one metal component and at least one ceramic component, said first and second electrical conductors and said quantity of material being a circuit line, said quantity of material being a resistor for said circuit line; and

at least one electrical component positioned on and electrically coupled to said circuitized substrate.

26. The electrical assembly of claim 25 wherein said at least one electrical component comprises a semiconductor chip and said circuitized substrate is a chip carrier substrate.

27. The electrical assembly of claim 25 wherein said circuitized substrate comprises a printed circuit board.

28. An information handling system comprising:

a housing;

a circuitized substrate positioned substantially within said housing and including a first dielectric layer, first and second electrical conductors spacedly positioned on said first dielectric layer, a quantity of material on said first dielectric layer in contact with said first and second electrical conductors, said quantity of material including a polymer resin and a quantity of nano-powders including a mixture of at least one metal component and at least one ceramic component, said first and second electrical conductors and said quantity of material being a circuit line, said quantity of material being a resistor for said circuit line; and

at least one electrical component positioned on and electrically coupled to said circuitized substrate.

29. The invention of claim 28 wherein said information handling system comprises a personal computer.

30. The invention of claim 28 wherein said information handling system comprises a mainframe computer.

31. The invention of claim 28 wherein said information handling system comprises a computer server.