Reliability enhancement process

• US 20060151581A1
• Filed: 01/10/2005
• Published: 07/13/2006
• Est. Priority Date: 01/10/2005
• Status: Active Grant

• Current Assignee: Lockheed Martin Corporation (Martin Marietta Corporation)
• Original Assignee: Lockheed Martin Corporation (Martin Marietta Corporation)
• Inventors: Vos, David L., Shields, Richard, Riegle, Ryan S., Murphy, William E.
• Granted Patent: US 7,719,108 B2
• Time in Patent Office: Days
• US Class Current: 228/245
• CPC Class Codes: B23K 1/0016 Brazing of electronic components
• CPC Class Codes: B23K 2101/40 Semiconductor devices
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2924/00011 Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H05K 1/0209 External configuration of printed circuit board adapted for heat dissipation, e.g. lay-out of conductors, coatings
• CPC Class Codes: H05K 2201/09781 Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
• CPC Class Codes: H05K 2201/10689 Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
• CPC Class Codes: H05K 2201/10734 Ball grid array [BGA]; Bump grid array
• CPC Class Codes: H05K 2201/10969 Metallic case or integral heatsink of component electrically connected to a pad on PCB
• CPC Class Codes: H05K 3/341 Surface mounted components
• CPC Class Codes: Y02P 70/50 Manufacturing or production processes characterised by the final manufactured product

Abstract

A method of packaging a semiconductor component with a printed wiring board is disclosed. The method includes determining a first distance, applying a thin film onto a surface of the semiconductor component such that the thin film is spaced apart from a support of the semiconductor, applying a solder pad onto the printed wiring board, placing the semiconductor component with the thin film onto the printed wiring board, and positioning the thin film adjacent the solder pad.

Claims

1. A method of packaging a semiconductor component with a printed wiring board, the semiconductor component having a first surface and a support extending from the first surface, and the support having a distal end spaced a first distance from the first surface, the method comprising:

applying a thin film onto the first surface of the semiconductor component, the thin film having a length and a width, having a first thickness less than the first distance, and having thermally conductive particles;

applying a solder pad onto the printed wiring board;

placing the semiconductor component with the thin film onto the printed wiring board; and

positioning the thin film adjacent the solder pad, between the semiconductor component and the printed wiring board.

2. The method of claim 1, wherein the semiconductor component comprises at least one of a thin small-area outline package (“

TSOP”

) and a ball grid array (“

BGA”

) package.

3. The method of claim 1, wherein the thin film comprises at least one of epoxy, gold, nickel, copper, tin, silver, glass, and adhesive.

4. The method of claim 1, wherein applying the thin film further comprises at least one of spraying the thin film on the semiconductor component, brushing the thin film on the semiconductor component, and attaching the thin film on the semiconductor component.

5. The method of claim 1, wherein the solder pad comprises at least one of tin, tin bismuth, and tin lead.

6. The method of claim 1, wherein positioning the solder pad and the thin film further comprises at least one of reflowing the solder pad, heating the solder pad and the thin film, thermally coupling the solder pad to the thin film, inductively heating the solder pad and the thin film, and creating a physical connection between the solder pad and some of the thermally conductive particles of the thin film.

7. The method of claim 1, further comprising:

providing a thermal path between the semiconductor component and the printed wiring board using the thin film and the solder path.

8. The method of claim 1, wherein the solder pad is applied such that the planar dimensions of the solder pad generally correspond to the planar dimensions of the thin film.

9. The method of claim 1, wherein the printed wiring board comprises, at least one of a plurality of thermally conductive particles, an epoxy glass, an FR4 epoxy sheet, G-10 glass, polymide, multifunctional epoxy, non-MDA polymide, flex tape, ceramic, Silicon, and liquid crystal display glass.

10. The method of claim 1, further comprising selecting a melting point of the thin film and a second melting point of the solder pad such that the melting point of the thin film is greater than the second melting point of the solder pad.

11. The method of claim 1, wherein the supports have a first coefficient of thermal expansion, and wherein the solder pad has a second coefficient of thermal expansion, the method further comprising at least one of selecting the solder pad material such that the second coefficient of thermal expansion is comparable to the first coefficient of thermal expansion, selecting the solder pad material such that the second coefficient of thermal expansion is less than the first coefficient of thermal expansion, and selecting the solder pad material such that the second coefficient of thermal expansion matches the first coefficient of thermal expansion.

12. The method of claim 1, wherein the solder pad has a solder pad thickness, the method further comprising selecting the first thickness such that the first thickness is less than the solder pad thickness.

13. A component package comprising:

a semiconductor component having at least one surface and at least one support;

a thin film having first and second surfaces, the first surface being cured on the at least one surface of the semiconductor component, and spaced apart from the at least one support; and

a printed wiring board having a solder pad thereon, the semiconductor component being mounted on the printed wiring board, and the thin film being positioned adjacent the solder pad.

14. The package of claim 13, wherein the semiconductor component comprises at least one of a thin small-area outline package (“

TSOP”

) and a ball grid array (“

BGA”

) package.

15. The package of claim 13, wherein the thin film comprises a plurality of thermally conductive particles.

16. The package of claim 15, wherein the plurality of thermally conductive particles comprises a metal.

17. The package of claim 13, wherein the positioned solder pad further comprises at least one of a reflowed solder pad, and a solder pad physically connected to the thin film.

18. The package of claim 13, wherein the solder pad comprises at least one of tin, tin bismuth, and tin lead.

19. The package of claim 13, wherein the semiconductor component comprises a substrate, and wherein the substrate comprises at least one of ceramic, plastic, silicon, and metallic elements.

20. The package of claim 13, wherein the printed wiring board comprises a plurality of thermally conductive particles thereon.

21. The package of claim 13, and wherein a melting point of the thin film is greater than a second melting point of the solder pad.

22. The package of claim 13, wherein the at least one support has a first coefficient of thermal expansion, wherein the solder pad also has a second coefficient of thermal expansion, and wherein the second coefficient of thermal expansion and the first coefficient of thermal expansion are substantially equal.

23. The package of claim 13, wherein the at least one support has a first coefficient of thermal expansion, wherein the solder pad also has a second coefficient of thermal expansion, and wherein the first coefficient of thermal expansion is at least equal to the second coefficient of thermal expansion.

24. The package of claim 13, wherein the solder pad has a solder pad thickness, wherein the thin film has a thin film thickness, and wherein the thin film thickness is less than the solder pad thickness.