Receiver and method thereof

• US 20060158366A1
• Filed: 01/13/2006
• Published: 07/20/2006
• Est. Priority Date: 01/18/2005
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd. (Samsung Group)
• Original Assignee: Samsung Electronics Co. Ltd. (Samsung Group)
• Inventors: Kim, Yong-Woon
• Granted Patent: US 7,427,938 B2
• Time in Patent Office: Days
• US Class Current: 341/155
• CPC Class Codes: H04B 1/001 Channel filtering, i.e. selecting a frequency channel within the SDR system multiplexing of multicarrier modulation signals being represented by different frequencies H04L5/06; multiplexing of multicarrier modulation signals H04L5/023
• CPC Class Codes: H04B 1/28 the receiver comprising at least one semiconductor device having three or more electrodes

Abstract

A receiver and method thereof. The example receiver may include an analog-to-digital (ADC) converter for performing an over-sampling operation on a received signal to generate output data, the over-sampling operation based on a sampling frequency and an over-sampling coefficient and a fast fourier transform (FFT) calculating unit for performing a FFT on the output data of the ADC converter.

Claims

1. A receiver, comprising:

an analog-to-digital (ADC) converter for performing an over-sampling operation on a received signal to generate output data, the over-sampling operation based on a sampling frequency and an over-sampling coefficient; and

a fast fourier transform (FFT) calculating unit for performing a FFT on the output data of the ADC converter.

2. The receiver of claim 1, wherein the received signal is an analog signal.

3. The receiver of claim 1, wherein the sampling frequency is a Nyquist sampling frequency.

4. The receiver of claim 1, wherein the receiver is included within an orthogonal frequency division multiplexing (OFDM) system.

5. The receiver of claim 1, wherein the output data is a plurality of phase shifted versions of the received signal.

6. The receiver of claim 1, wherein the FFT calculating unit includes:

at least one FFT calculator performing the FFT operation on the output data; and

at least one phase compensating unit for compensating a phase variation of the output data based on the over-sampling coefficient.

7. The receiver of claim 1, wherein the ADC converter is a variable frequency ADC converter.

8. The receiver of claim 1, wherein the over-sampling coefficient is a positive integer number greater than or equal to 1.

9. The receiver of claim 1, wherein the FFT calculation unit operates at a processing speed which scales with the over-sampling coefficient.

10. The receiver of claim 1, wherein a phase variation of the output data is a phase difference, in a frequency domain, based on a time delay of the output data.

11. The receiver of claim 6, further comprising:

a mixer for mixing phase compensated data sequences received from the phase compensator and outputting a data sequence based on the mixed phase compensated data sequences.

12. The receiver of claim 1, wherein the output data of the analog-to-digital converter is configured with data blocks being equal in number to the over-sampling coefficient, each of the data blocks arranged in parallel and separated by a time interval based on the sampling frequency.

13. The receiver of claim 1, wherein the FFT calculating unit includes a plurality of lower-speed FFT calculators, each of the plurality of lower-speed FFT calculators receiving a portion of the output data from the ADC converter and performing an FFT operation on the received portions.

14. The receiver of claim 13, wherein the number of lower-speed FFT calculators equals the sampling coefficient.

15. The receiver of claim 13, wherein the FFT operations are performed by the plurality of lower speed FFT calculators concurrently on each of the received portions of the output data.

16. The receiver of claim 1, wherein the FFT calculating unit includes a higher-speed FFT calculator, the higher-speed FFT calculator receiving the output data from the ADC converter and performing an FFT operation on the received portions.

17. The receiver of claim 16, wherein the higher-speed FFT calculator is the only FFT calculator included within the FFT calculating unit, the higher-speed FFT serially processing received portions of the output data.

24. A method of receiving data with the receiver of claim 1.

18. A method for receiving data, comprising:

over-sampling a received signal based on an over-sampling coefficient and a sampling frequency to generate over-sampled data; and

performing a fast fourier transform (FFT) on the over-sampled data to generate FFT over-sampled data.

19. The method of claim 18, further comprising:

compensating for phase shifts in the FFT over-sampled data based on the over-sampling coefficient; and

combining the compensated FFT over-sampled data to generate an output signal.

20. The method of claim 19, wherein the output signal is a demodulated signal with an improved signal-to-noise (SNR) ratio.

21. The method of claim 18, wherein the over-sampling coefficient is a positive integer greater than or equal to 1.

22. The method of claim 18, wherein the FFT is performed at a processing speed which scales with the over-sampling coefficient.

23. The method of claim 18, wherein performing the FFT generates phase shifts in the FFT over-sampled data.