Tcet expander

• US 20060161269A1
• Filed: 10/31/2003
• Published: 07/20/2006
• Est. Priority Date: 12/19/2002
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Staiger, Dieter E
• Granted Patent: US 8,086,771 B2
• Time in Patent Office: Days
• US Class Current: 700/20
• CPC Class Codes: B60W 2050/0002 Automatic control, details of type of controller or control system architecture
• CPC Class Codes: B60W 50/00 Details of control systems for road vehicle drive control not related to the control of a particular sub-unit , e.g. process diagnostic or vehicle driver interfaces
• CPC Class Codes: G05B 19/042 using digital processors G05B19/05 takes precedence
• CPC Class Codes: G05B 2219/2216 Define module independent and module specific element, interconnection, capability
• CPC Class Codes: G05B 2219/25308 Ecu, standard processor connects to asic connected to specific application
• CPC Class Codes: G05B 2219/2637 Vehicle, car, auto, wheelchair

Abstract

The present invention relates to the field of embedded processing systems and electronic control units (ECUs)and to autonomic embedded computing solutions. The present invention proposes to remove or extract the application-specific support functions and respective I/O subsystems from the main processors or controllers of the system, to include said extracted circuits into a respective number of ASIC chips or the like, and to connect them preferably via a supervising General Controller Unit (12) to a plurality of standard and low-price processors (40), which have the task to supply the ASIC and the multiple functions thereof with enough computing power.

Claims

1. An electronic circuit in an embedded processing system covering a plurality of technical applications, the operative functions of which are performed with a respective plurality of application-specific Electronic Control Units (ECU), characterized by having

a) a plurality of controller means (30A, . . . 30E) comprising each a respective one of said application-specific support functions and I/O subsystems, and

b) a plurality of standard processor units (40) having a standard I/O-interface operatively connecting to a respective controller means (30A, . . . 30E) and supplying it with computing power,

c) wherein a processor unit (40) and a respective one of said controller means (30A, . . . 30E) are implemented on different chips.

2. The circuit according to claim 1, further having mapping means (70, 26) and a General Controller Unit (12) operatively coupled thereto for dynamically switching a processor unit (40) to a selected controller means (30A, . . . 30E) under consideration of processor timing requirements.

3. The circuit according to the preceding claim having a primary layer (50) comprising basic configuration layout data (54) and a standard interface means (52) for connecting to said plurality of standard processors (40), and a secondary layer (60) comprising a preprogrammed, “

autonomic-state”

switching means (62), a preprogrammed emergency switching means (64) and a port interface means (66) connecting to said plurality of application-specific I/O subsystems.

4. The circuit according to the preceding claim, further having an additional controller implementing a monitoring function (90,100) for the operational status of said plurality of standard processing units (40) and controller means (30A, . . . 30E), and being operatively coupled to said General Controller Unit (12).

5. The circuit according to claim 1, further comprising a database storing instructions how to handle specific breakdown cases of error state cases associated wit either of said standard processors.

6. The circuit according to claim 1, further comprising a emergency controller (110, 112) for continuously storing current global positioning system (GPS) coordinates and dedicated to send an emergency signal including said coordinates, in case one or more external sensor devices detect an emergency case.

7. An embedded system having an electronic circuit according to one of the preceding claims 1 to 6.