Scratch pad block
First Claim
1. A method of storing addressable units of data in a non-volatile memory array having a minimum unit of erase of a block and a minimum unit of program of a page, a page containing one or more addressable units of data, a page containing less data than a block, comprising:
- writing a plurality of addressable units of data in a first block with a first degree of parallelism;
subsequently copying the plurality of addressable units of data to a second block where they are written in a write operation having a second degree of parallelism that is higher than the first degree of parallelism; and
subsequently writing additional addressable units of data to the first block while the first block contains the plurality of addressable units of data.
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Accused Products
Abstract
In a memory array having a minimum unit of erase of a block, a scratch pad block is used to store data that is later written to another block. The data may be written to the scratch pad block with a low degree of parallelism and later written to another location with a high degree of parallelism so that it is stored with high density. Data may be temporarily stored in the scratch pad block until it can be more efficiently stored elsewhere. This may be when some other data is received. Unrelated data may be stored in the same page of a scratch pad block.
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Citations
22 Claims
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1. A method of storing addressable units of data in a non-volatile memory array having a minimum unit of erase of a block and a minimum unit of program of a page, a page containing one or more addressable units of data, a page containing less data than a block, comprising:
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writing a plurality of addressable units of data in a first block with a first degree of parallelism;
subsequently copying the plurality of addressable units of data to a second block where they are written in a write operation having a second degree of parallelism that is higher than the first degree of parallelism; and
subsequently writing additional addressable units of data to the first block while the first block contains the plurality of addressable units of data. - View Dependent Claims (2, 3, 4, 5)
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6. A method of writing addressable units of data to multi-level cells in a non-volatile memory array, the memory array having a unit of erase of a block, a multi-level cell having more than two possible programmed states corresponding to more than one bit of data, comprising:
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receiving a first addressable unit of data and a second addressable unit of data from a host;
programming the first addressable unit of data to both a first block and to a plurality of multi-level cells of a second block;
programming the plurality of multi-level cells of the second block according to bits of the second unit of data while the first addressable unit of data is held in the first block without programming the second addressable unit of data to the first block; and
subsequently marking the first addressable unit of data in the first block as obsolete only after verifying that the plurality of multi-level cells of the second block are fully programmed to states that reflect bits of the second unit of data. - View Dependent Claims (7, 8, 9)
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10. A method of storing logically non-sequential addressable units of data in a non-volatile memory array having minimum units of erase of a block and minimum units of programming of a page, comprising:
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storing a first at least one addressable unit of data in a first page of a first block;
storing a second at least one addressable unit of data in parallel with the first at least one addressable unit of data in the first page of the first block, the second at least one addressable unit of data not logically sequential with the first at least one addressable unit of data;
subsequently copying the first at least one addressable unit of data to a second block and copying the second at least one addressable unit of data to a third block; and
subsequently storing a third at least one addressable unit of data in the first block while the first block holds the first at least one addressable unit of data and the second at least one addressable unit of data. - View Dependent Claims (11, 12, 13, 14)
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15. A method of storing data in a non-volatile memory array having memory cells arranged in minimum units of erase of an erase block, groups of erase blocks linked to form metablocks, a metapage being the unit of programming of a metablock, comprising:
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storing a first sector of data in a first metapage of a first metablock;
storing at least a second sector in at least a second metapage of the first metablock;
writing the first sector of data, the at least a second sector of data and a third sector of data together to a metapage of a second metablock when the third sector of data is received; and
subsequently storing a fourth sector of data in the first metablock without erasing the first sector of data and the at least a second sector of data from the first metablock. - View Dependent Claims (16, 17, 18, 19, 20)
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21. A method of storing data in a non-volatile memory array having memory cells arranged in minimum units of erase of an erase block, a page being the minimum unit of programming of an erase block, comprising:
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storing a first sector of data in a first page of a first erase block;
storing at least one additional sector in at least one additional page of the first erase block;
writing the first sector of data, the at least one additional sector of data and a final sector of data together to a page of a second erase block when the final sector of data is received; and
subsequently storing a second sector of data in the first erase block without erasing the first sector of data and the at least one additional sector from the first erase block. - View Dependent Claims (22)
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Specification