Controlling device access fairness in switched fibre channel fabric loop attachment systems

• US 20060165115A1
• Filed: 01/26/2005
• Published: 07/27/2006
• Est. Priority Date: 01/26/2005
• Status: Active Grant

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Emulex Design & Manufacturing Corp. (Broadcom, Inc.)
• Inventors: Doherty, Terrence R., Mies, Carl Joseph, Warren, Bruce Gregory, Ambrose, Thomas Phillip
• Granted Patent: US 7,813,360 B2
• Time in Patent Office: Days
• US Class Current: 370/458
• CPC Class Codes: H04L 49/15 Interconnection of switching modules
• CPC Class Codes: H04L 49/3009 Header conversion, routing tables or routing tags
• CPC Class Codes: H04L 49/357 Fibre channel switches
• CPC Class Codes: H04L 49/503 Policing

Abstract

Embodiments of the present invention are directed to controlling device access fairness in frame-based switches by automatically and continuously counting the number of actively communicating devices connected to each port and the type of devices connected to each port, and adjusting fairness accordingly. During a sampling window, the number of active devices and the type of devices connected to each port is determined. At the start of each fairness window, a weighted number of slots are assigned to each port based on the number of active devices connected to each port and the type of devices connected to that port. Within a single fairness window, each port is able to provide device accesses to the frame-based switch in accordance with the number of slots assigned to that port.

Claims

1. A method for managing device access fairness in a frame-based switch, comprising:

counting a number of active devices connected to each port on the frame-based switch during a sampling window; and

allocating a weighted number of slots to each port within the frame-based switch in accordance with the number of active devices connected to each port.

2. The method as recited in claim 1, further comprising:

at a beginning of a fairness window, allocating a weighted number of slots to each source port/destination port pair within the frame-based switch in accordance with the number of active devices connected to the source port.

3. The method as recited in claim 2, further comprising:

making source port/destination port connections on a first-come first-served basis during the fairness window as long as the source port/destination port pair for a particular connection has a nonzero number of allocated slots; and

decrementing the number of slots allocated to the source port/destination port pair each time a source port/destination port connection is made.

4. The method as recited in claim 2, the step of counting a number of active devices connected to each port on the frame-based switch during a sampling window further comprising:

maintaining a table of domain and area addresses for each port that identifies the frame-based switch and port associated with requests or responses being received at that port; and

maintaining a bitmap associated with each domain and area address in the table that contains an asserted bit for each active device connected to that port.

5. The method as recited in claim 4, the step of counting a number of active devices connected to each port further comprising:

determining if a request being received at that port is from an initiator; and

if the request being received is from an initiator, storing an indication that the device connected to that port is an initiator.

6. The method as recited in claim 4, the step of maintaining a table of domain and area addresses for each port further comprising:

receiving a request or response at the port;

comparing the domain and area addresses of the received request or response with the domain and area addresses stored in the table; and

if the domain and area address of the received request or response does not match a domain and area address stored in the table, adding the domain and area address to the table.

7. The method as recited in claim 4, the step of maintaining a bitmap associated with each domain and area address in the table further comprising:

if the domain and area address of the received request or response matches a domain and area address stored in the table, applying an Arbitrated Loop Protocol Address (ALPA) to a hash table to identify a particular bit associated with that ALPA in the bitmap associated with the compared domain and area address, and asserting that particular bit if it was not already asserted; and

if the domain and area address of the received request or response does not match a domain and area address stored in the table, applying the ALPA to a hash table to identify a particular bit associated with that ALPA in the bitmap associated with the compared domain and area address, and asserting that particular bit.

8. The method as recited in claim 5, further comprising:

at the end of the sampling window, summing up the asserted bits in all bitmaps associated with each port to compute the number of active devices connected to that port.

9. The method as recited in claim 8, the step of allocating a weighted number of slots to each source port/destination port pair further comprising, for each source port/destination port pair that is not a device/device pair:

allocating A slots as an initial allocation;

allocating B additional slots if the source port is an initiator;

allocating C additional slots in accordance with the number of active devices connected to the source port, where C is determined by using the number of active devices connected to the source port as an input to a lookup table; and

allocating D additional slots in accordance with a tweak register.

10. The method as recited in claim 8, the step of allocating a weighted number of slots to each source port/destination port pair further comprising, for each source port/destination port pair that is a device/device pair:

allocating A slots as an initial allocation; and

allocating D additional slots in accordance with a tweak register.

11. The method as recited in claim 3, further comprising resetting the fairness window if

every source port/destination port slot allocation is zero, or

all source port/destination port slot allocations for a particular source port is zero, but no other ports in the frame-based switch are making any requests or responses, or

if any source port/destination port slot allocation is zero, but the destination port for a next pending request or response from the source port is free.

12. An apparatus for managing device access fairness in a frame-based switch, comprising:

a sampling window counter for generating a sampling window;

an active device count circuit for counting a number of active devices connected to each port on the frame-based switch during the sampling window; and

a slot allocation circuit for allocating a weighted number of slots to each port within the frame-based switch in accordance with the number of active devices connected to each port.

13. The apparatus as recited in claim 12, the slot allocation circuit including a slot allocation counter for each port, the slot allocation circuit configured for allocating a weighted number of slots to each source port/destination port pair within the frame-based switch in accordance with the number of active devices connected to the source port and storing the slot allocations in the slot allocation counters to establish a beginning of a fairness window.

14. The apparatus as recited in claim 13, further comprising:

a router for making source port/destination port connections on a first-come first-served basis during the fairness window as long as the source port/destination port pair for a particular connection has a nonzero number of allocated slots; and

the slot allocation circuit further configured for decrementing the number of slots allocated to the source port/destination port pair stored in a slot allocation counter each time a source port/destination port connection is made.

15. The apparatus as recited in claim 13, the active device count circuit further comprising:

a table of domain and area addresses for each port that identifies the frame-based switch and port associated with requests or responses being received at that port; and

a bitmap associated with each domain and area address in the table that contains an asserted bit for each active device connected to that port.

16. The apparatus as recited in claim 15, the active device count circuit further comprising:

logic for determining if a request being received at that port is from an initiator; and

a current initiator register and a previous initiator register for storing an indication that the device connected to that port is an initiator if the request being received is from an initiator.

17. The apparatus as recited in claim 15, the active device count circuit further comprising:

a comparator circuit for comparing the domain and area addresses of the received request or response with the domain and area addresses stored in the table, and adding the domain and area address to the table if the domain and area address of the received request or response does not match a domain and area address stored in the table.

18. The apparatus as recited in claim 15, the active device count circuit further comprising a hash table and further configured for:

if the domain and area address of the received request or response matches a domain and area address stored in the table, applying an Arbitrated Loop Protocol Address (ALPA) to the hash table to identify a particular bit associated with that ALPA in the bitmap associated with the compared domain and area address, and asserting that particular bit if it was not already asserted; and

if the domain and area address of the received request or response does not match a domain and area address stored in the table, applying the ALPA to the hash table to identify a particular bit associated with that ALPA in the bitmap associated with the compared domain and area address, and asserting that particular bit.

19. The apparatus as recited in claim 16, further comprising:

a summing circuit for summing up the asserted bits in all bitmaps associated with each port at the end of the sampling window to compute the number of active devices connected to that port.

20. The apparatus as recited in claim 19, the slot allocation circuit further comprising:

an initial allocation register for storing A slots as an initial allocation;

an initiator register for storing B slots if the source port is an initiator;

a lookup table for receiving the number of active devices connected to the source port as an input and generating and storing C slots;

a tweak register for storing D slots for compensation; and

a summing circuit for summing A, B, C and D to compute the slot allocation for each source port/destination port pair that is not a device/device pair.

21. The apparatus as recited in claim 20, the summing circuit for summing A and D to compute the slot allocation for each source port/destination port pair that is a device/device pair.

22. The apparatus as recited in claim 14, the router configured for resetting the slot allocation counters and the fairness window if

every source port/destination port slot allocation is zero, or

all source port/destination port slot allocations for a particular source port is zero, but no other ports in the frame-based switch are making any requests or responses, or

if any source port/destination port slot allocation is zero, but the destination port for a next pending request or response from the source port is free.

23. A frame-based switch comprising the apparatus of claim 12.

24. A storage system comprising the frame-based switch of claim 23.