Systems and methods for mitigating latency associated with error detection and correction
First Claim
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1. A system for mitigating latency associated with error detection and correction of a data structure, the system comprising:
- a packet generator that builds a response packet associated with a request for a data structure based on a tag portion of the data structure; and
an error detection and correction (EDC) component that detects and corrects errors in the data structure concurrently with the building of the response packet by the packet generator.
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Abstract
Systems and methods for mitigating latency associated with error detection and correction of a data structure are disclosed. One embodiment of a system may comprise a packet generator that builds a response packet associated with a request for a data structure based on a tag portion of the data structure. The system may also comprise an error detection and correction (EDC) component that detects and corrects errors in the data structure concurrently with the building of the response packet by the packet generator.
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Citations
34 Claims
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1. A system for mitigating latency associated with error detection and correction of a data structure, the system comprising:
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a packet generator that builds a response packet associated with a request for a data structure based on a tag portion of the data structure; and
an error detection and correction (EDC) component that detects and corrects errors in the data structure concurrently with the building of the response packet by the packet generator. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. A memory system comprising:
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an error detection and correction (EDC) component that detects and corrects errors in given code word associated with a data structure formed from a plurality of code words;
a packet generator that builds a response packet associated with a request for a data structure based on a tag portion of the data structure residing in a first code word of the plurality of code words; and
a plurality of memory devices that store the data structure based on a given memory address, and provide the EDC component the plurality of code words in response to a request for the data structure;
wherein the EDC component receives the plurality of code words in a sequential manner and forwards a copy of the tag portion from the first code word to facilitate the building of a response packet by the packet generator concurrently with the error detection and correction of the data structure. - View Dependent Claims (18, 19, 20, 21, 22)
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23. A system for correcting errors in a data structure in response to a request for the data structure, the system comprising:
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means for performing error detection and correction on a data structure that includes a tag portion;
means for issuing a command to build a response packet based on the tag portion; and
means for building a response packet based on the issue command concurrently with the error detection and correction on the data structure. - View Dependent Claims (24, 25)
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26. A method for mitigating latency associated with error detection and correction of a data structure, the method comprising:
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providing a data structure in response to a request for the data structure, the data structure having a tag portion;
building a response packet based on the tag portion; and
performing error detection and correction on the data structure concurrently with the building of the response packet. - View Dependent Claims (27, 28, 29, 30, 31)
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32. A method for mitigating latency associated with a data request, the method comprising:
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providing a plurality of code words forming a data structure in sequential order, a first code word provided of the plurality of code words having a tag portion;
building a header of a response packet based on the tag portion;
performing error detection and correction on the plurality of code words in sequential order concurrently with the building of the header; and
transmitting the response packet with data associated with a given code word that has been determined to be without errors concurrently with the performing of error detection and correction on a subsequent code word. - View Dependent Claims (33, 34)
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Specification