Electronic device, semiconductor device and manufacturing method thereof
First Claim
Patent Images
1. A semiconductor device comprising:
- a gate electrode formed over a substrate having an insulating surface;
a gate insulating film covering the gate electrode;
a first semiconductor layer including a channel formed over the gate insulating film;
a second semiconductor layer including an impurity element of an n-type or a p-type conductivity formed over the first semiconductor layer; and
a source wiring and a drain wiring formed over the second semiconductor layer, wherein the source wiring crosses and overlaps the first semiconductor layer, and wherein a portion of the first semiconductor layer overlapped with a region between the source wiring and the drain wiring is a channel.
1 Assignment
0 Petitions
Accused Products
Abstract
The present invention provides a manufacturing process using a droplet-discharging method that is suitable for manufacturing a large substrate in mass production. A photosensitive material solution of a conductive film is selectively discharged by a droplet-discharging method, selectively exposed to laser light, and developed or etched, thereby allowing only the region exposed to laser light to be left and realizing a source wiring and a drain wiring having a more microscopic pattern than the pattern itself formed by discharging. One feature of the source wiring and the drain wiring is that the source wiring and the drain wiring cross an island-like semiconductor layer and overlap it.
165 Citations
24 Claims
-
1. A semiconductor device comprising:
-
a gate electrode formed over a substrate having an insulating surface;
a gate insulating film covering the gate electrode;
a first semiconductor layer including a channel formed over the gate insulating film;
a second semiconductor layer including an impurity element of an n-type or a p-type conductivity formed over the first semiconductor layer; and
a source wiring and a drain wiring formed over the second semiconductor layer, wherein the source wiring crosses and overlaps the first semiconductor layer, and wherein a portion of the first semiconductor layer overlapped with a region between the source wiring and the drain wiring is a channel. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
-
-
9. A semiconductor device comprising:
-
a gate electrode formed over a substrate having an insulating surface;
a gate insulating film covering the gate electrode;
a first semiconductor layer including a channel formed over the gate insulating film;
a second semiconductor layer including an impurity element of an n-type or a p-type conductivity formed over the first semiconductor layer; and
a source wiring and a drain wiring formed over the second semiconductor layer, wherein a length between one end and the other end of the first semiconductor layer is a sum of a channel length, a length of a first region overlapping the drain wiring, a length between the first region and one end of the first semiconductor layer, a length of a second region overlapping the source wiring, and a length between the second region and the other end of the first semiconductor layer. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
-
-
17. A manufacturing method of a semiconductor device comprising:
-
forming a gate electrode over a substrate having an insulating surface;
forming a gate insulating film over the gate electrode;
forming a first semiconductor layer over the gate insulating film;
forming a second semiconductor layer over the first semiconductor layer, the second semiconductor layer including an impurity element of an n-type or a p-type conductivity;
forming a first pattern over the second semiconductor layer by a droplet-discharging method or a printing method;
irradiating a region whose width is smaller than that of the first pattern with a laser light; and
removing a region of the first pattern which is not irradiated with the laser light to form a source wiring and a drain wiring. - View Dependent Claims (18, 19, 20)
-
-
21. A manufacturing method of a semiconductor device comprising:
-
forming a gate electrode over a substrate having an insulating surface;
forming a gate insulating film over the gate electrode;
forming a first semiconductor layer over the gate insulating film;
forming a second semiconductor layer over the first semiconductor layer, the second semiconductor layer including an impurity element of an n-type or a p-type conductivity;
forming a first pattern over the second semiconductor layer by a droplet-discharging method or a printing method;
irradiating a region whose width is smaller than that of the first pattern with a laser light;
removing a region of the first pattern which is not irradiated with the laser light to form a source wiring and a drain wiring; and
etching the first semiconductor layer and the second semiconductor layer using the drain wiring and the source wiring as masks so as to form a channel in a portion of the first semiconductor layer, and to separate the second semiconductor layer into two portions which sandwich the channel. - View Dependent Claims (22, 23, 24)
-
Specification
-
- Resources
Litigation Campaign Assessment
Thank you for your request. You will receive a custom alert email when the Litigation Campaign Assessment is available.
×
-
Current AssigneeSemiconductor Energy Laboratory Co., Ltd.
-
Original AssigneeSemiconductor Energy Laboratory Co., Ltd.
-
InventorsKuwabara, Hideaki, Maekawa, Shinji
-
Granted Patent
-
Time in Patent OfficeDays
-
Field of Search
-
US Class Current257/401
-
CPC Class CodesH01L 29/41733 for thin film transistors w...H01L 29/458 for thin film silicon, e.g....H01L 29/66765 Lateral single gate single ...H01L 29/78678 with inverted-type structur...H01L 29/7869 having a semiconductor body...
