Integrated transformer structure and method of fabrication

• US 20060170527A1
• Filed: 02/02/2005
• Published: 08/03/2006
• Est. Priority Date: 02/02/2005
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Braunisch, Henning
• Granted Patent: US 7,280,024 B2
• Time in Patent Office: Days
• US Class Current: 336/223
• CPC Class Codes: H01F 17/0006 Printed inductances printed coils for dynamo-electric machines H02K3/26; printed circuits H05K
• CPC Class Codes: H01F 19/04 Transformers or mutual inductances suitable for handling frequencies considerably beyond the audio range resonant circuits H03H
• CPC Class Codes: H01F 27/2804 Printed windings
• CPC Class Codes: H01F 41/046 structurally combined with ferromagnetic material
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/16235 the bump connector connecting to a via metallisation of the item
• CPC Class Codes: H01L 2224/16265 the item being a discrete passive component
• CPC Class Codes: H01L 23/49822 Multilayer substrates multilayer metallisation on monolayer substrate H01L23/498
• CPC Class Codes: H01L 23/49833 the chip support structure consisting of a plurality of insulating substrates
• CPC Class Codes: H01L 23/49838 Geometry or layout
• CPC Class Codes: H01L 23/645 Inductive arrangements H01L23/647, H01L23/66 take precedence
• CPC Class Codes: H01L 2924/00011 Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01019 Potassium [K]
• CPC Class Codes: H01L 2924/01077 Iridium [Ir]
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/15312 being a pin array, e.g. PGA
• CPC Class Codes: H01L 2924/3011 Impedance

Abstract

A microelectronic assembly including a die substrate, a plurality of electronic components formed in and on the die substrate and connected to one another to form an integrated circuit, a first and a second single-turn inductor, and a magnetic material electro-magnetically coupling the first and the second single-turn inductor to one another to form a transformer, the transformer being connected to the integrated circuit.

Claims

1. A microelectronic assembly, comprising:

a die substrate;

a plurality of electronic components formed in and on the die substrate and connected to one another to form an integrated circuit;

a first and a second single-turn inductor; and

a magnetic material electro-magnetically coupling the first and the second single-turn inductor to one another to form a transformer, the transformer being connected to the integrated circuit.

2. The microelectronic assembly of claim 1 wherein the first single-turn inductor and the second single-turn inductor are formed from a group comprising of copper and 0.05% copper doped aluminum.

3. The microelectronic assembly of claim 1 wherein the magnetic material is a soft magnetic material with a relative permeability of about 95-900.

4. The microelectronic assembly of claim 3 wherein the magnetic material has a resistivity of 102 micro-ohms times centimeter, and is stable until at least 400 degrees Celsius.

5. The microelectronic assembly of claim 1 wherein the magnetic material has a uniaxial anisotropy and a ferromagnetic resonance frequency of 1.4 GHz.

6. The microelectronic assembly of claim 1 wherein the magnetic material is a magneto-dielectric.

7. The microelectronic assembly of claim 6 wherein the magneto-dielectric has a relative permeability of about 300.

8. The microelectronic assembly of claim 7 wherein the magneto-dielectric comprises an amorphous cobalt alloy.

9. The microelectronic assembly of claim 1 further comprising a package substrate, the die substrate being mounted to the package substrate, and wherein the transformer is integrated within the package substrate.

10. The microelectronic assembly of claim 9 wherein the transformer is one of a plurality of transformers formed within the package substrate.

11. The microelectronic assembly of claim 9 further comprising a first conductive layer within the package substrate.

12. The microelectronic assembly of claim 11 further comprising a magnetic layer over the first conductive layer that includes the magnetic material and which is patterned into a plurality of loops.

13. The microelectronic assembly of claim 12 wherein at least a first loop of the plurality of loops has a single loop pattern and at least a second loop of the plurality of loops has a double-loop pattern.

14. The microelectronic assembly of claim 12 further comprising a set of conductive sidewalls that are formed through the plurality of loops and which are connected to the first conductive layer, at least some sidewalls of the set of conductive sidewalls being magnetically coupled to each other through a loop within the plurality of loops.

15. The microelectronic assembly of claim 14 wherein the set of conductive sidewalls are formed by vias at orthogonal angles to the package substrate.

16. The microelectronic assembly of claim 14 further comprising a set of conductive portions formed on opposing sides of the magnetic layer from the first conductive layer wherein each conductive portion within the set of conductive portions is connected to each sidewall within the set of conductive sidewalls.

17. The microelectronic assembly of claim 1 wherein the transformer is used in conjunction with power conversion circuitry.

18. The microelectronic assembly of claim 17 wherein the transformer is incorporated into a smoothing filter of a power converter.

19. A microelectronic assembly, comprising:

a package substrate;

a transformer within the package substrate formed with a pair of inductors each having a single-turn solenoid;

a magnetic section inside each single-turn solenoid to electro-magnetically couple the pair of inductors;

a die substrate connected to the package substrate; and

a plurality of electronic components formed in and on the die substrate and connected to one another to form an integrated circuit.

20. The microelectronic assembly of claim 19 wherein the transformer is formed within the build-up packaging layers of the package substrate.

21. The microelectronic assembly of claim 19 wherein the transformer is one of a plurality of transformers integrated in the package substrate.

22. A microelectronic assembly, comprising:

a package substrate;

a power terminal on the package substrate;

a plurality of signal terminals on the package substrate;

a first single-turn inductor integrated in the package substrate and being electrically connected to the power terminal;

a second single-turn inductor formed in the package substrate;

a magnetic material integrated in the package substrate and electro-magnetically coupling the first and second single-turn inductors to one another so that the first and second single-turn inductors and the magnetic material form a transformer;

a first power contact on the package substrate and electrically connected to the second single-turn inductor; and

a plurality of signal conductors in the package substrate, each connecting the plurality of signal terminals to a first set of signal contacts on the package substrate.

23. The microelectronic assembly of claim 22, further comprising:

a die substrate mounted on the package substrate;

a plurality of electronic components formed in and on the die substrate and connected to one another to form an integrated circuit; and

a second power contact in the integrated circuit that is electrically connected to the first power contact in the package substrate; and

a second set of signal contacts in the integrated circuit that are electrically connected to the first set of signal contacts in the package substrate.

24. The microelectronic assembly of claim 22 wherein the magnetic material has a resistivity of 102 micro-ohms times centimeter, and is stable until at least 400 degrees Celsius.

25. A method of forming a transformer structure comprising:

forming a first conductive layer;

forming a magnetic layer over the first conductive layer;

patterning the magnetic layer into a plurality of loops;

forming, through the plurality of loops, a set of conductive sidewalls that are connected to the first conductive layer, at least some sidewalls of the set of conductive sidewalls being magnetically coupled to each other through a loop within the plurality of loops; and

forming a set of conductive portions formed on opposing sides of the magnetic layer from the first conductive layer wherein each conductive portion within the set of conductive portions is connected to each sidewall within the set of conductive sidewalls.

26. The method of claim 25 wherein the first conductive layer is formed within a package substrate.

27. The method of claim 25 wherein at least a first loop of the plurality of loops has a single loop pattern and at least a second loop of the plurality of loops has a double-loop pattern.

28. A method, the method comprising:

forming a first seed layer on a package substrate;

electroplating a first conductive layer on the first seed layer;

depositing a layer having magnetic properties over the first conductive layer;

patterning the layer having magnetic properties into a plurality of loops;

laser drilling a first via set in the plurality of loops to form opposite first and second sidewalls connected to the first conductive layer;

laser drilling a second via set in the plurality of loops to form opposite third and fourth sidewalls connected to the first conductive layer and magnetically coupled to the first and second sidewalls;

forming a second seed layer on the first and second via sets and the plurality of loops;

forming a dry film resist over the second seed layer;

creating openings in the dry film resist in predetermined locations;

electroplating a second conductive layer in the openings; and

removing the dry film resist and the second seed layer.

29. The method of claim 28 wherein the layer having magnetic properties is a magneto-dielectric material with a relative permeability of approximately 300.

30. The method of claim 28 wherein at least a first loop of the plurality of loops has a single loop pattern and at least a second loop of the plurality of loops has a double-loop pattern.