EMBEDDED DUO-PLANAR PRINTED INDUCTOR

• US 20060176135A1
• Filed: 02/07/2005
• Published: 08/10/2006
• Est. Priority Date: 02/07/2005
• Status: Active Grant

• Current Assignee: Northrop Grumman Systems Corporation (Northrop Grumman Corporation)
• Original Assignee: Northrop Grumman Corporation
• Inventors: Winter, Frank B., Harberts, Harry S., Tolan, Julius G.
• Granted Patent: US 7,088,215 B1
• Time in Patent Office: Days
• US Class Current: 336/200
• CPC Class Codes: H01F 17/0033 with the coil helically wound around a magnetic core
• CPC Class Codes: H01F 2017/002 Details of via holes for interconnecting the layers
• CPC Class Codes: H01F 41/041 Printed circuit coils apparatus or processes for manufacturing printed circuits in general H05K3/00
• CPC Class Codes: H05K 1/165 incorporating printed inductors
• CPC Class Codes: H05K 2201/097 Alternating conductors, e.g. alternating different shaped pads, twisted pairs; Alternating components
• CPC Class Codes: Y10T 29/4902 Electromagnet, transformer or inductor

Abstract

A highly compact inductor formed on opposite faces of a dielectric substrate. Sets of parallel spaced conductive traces formed on the opposite faces of the substrate are interconnected by metallized vias through the substrate, in such a way as to form a continuous spiral conductive path. The inductor is preferably formed as two closely adjacent segments, each with conductive traces on each face of the substrate and each having metallized vias interconnecting the conductive traces. The segments are electrically connected in series and produce a magnetic field that extends through each segment in opposite directions and is closely coupled from one segment to the other. The inductor is, therefore, electromagnetically similar to a wire-wound toroidal inductor, providing high inductance and contourable Q values, but is highly compact, especially in the z-axis direction normal to the substrate.

Claims

1. A compact inductor structure in two coplanar layers of a circuit board, the inductor structure comprising:

a dielectric substrate having upper and lower faces;

a first set of parallel conductive traces formed on the upper face of the substrate in a first plane;

a second set of parallel conductive traces formed on the lower face of the substrate in a second plane;

a plurality of metallized vias extending through the substrate and interconnecting the first and second sets of conductive traces to form a continuous spiral path with inductive properties;

the first and second sets of parallel conductive traces are arranged in two adjacent ranks wherein the first set of traces in one rank is coplanar with the first set of traces in the other rank and the second set of traces in one rank is coplanar with the second set of traces in the other rank so that the first and second sets of traces for both of the two ranks are contained in the same two parallel planes.

2. A compact inductor structure as defined in claim 1, wherein:

the metallized vias form with the conductive traces a first spiral path and a second spiral path; and

the structure further comprises a conductive trace that connects the first and second spiral paths in series;

wherein the first and second spiral paths form spatially parallel, serially connected inductor segments that are magnetically coupled together to form a composite inductor with desirably high inductance and Q values.

3. A compact inductor structure as defined in claim 1, wherein:

the metallized vias are formed in a direction normal to the upper and lower faces of the substrate; and

the first and second sets of parallel conductive traces are angularly offset with respect to each other, such that each metallized via makes a connection from one end of a trace in the first set to an end of the next successive trace in the second set.

4. A compact inductor structure as defined in claim 1, and further comprising:

a connecting trace in the second set of traces in one rank disposed to form a last trace near a distal edge of the one rank, the connecting trace having an end that extends within the second plane into the other rank, a via in the second rank connects to the end of the connecting trace to form an electrical interconnection between the first and second ranks.

10. A compact inductor structure as defined in claim 1 wherein the one rank is disposed adjacent and lateral to the other rank.

11. A compact inductor structure as defined in claim 10 wherein the spiral paths in the one rank do not overlap the spiral paths in the other rank except for a single connecting trace near one edge of the first rank that interconnects the first and second ranks so that the spiral paths in the first and second ranks are traversed in series.

5. A method for making a compact inductor embedded in a printed circuit board structure, the method comprising:

providing a dielectric substrate having upper and lower faces;

forming a first set of generally parallel conductive traces on the upper face of the substrate in a first plane;

forming a second set of generally parallel conductive traces on the lower face of the substrate in a second lane; and

forming a plurality of conductive vias through the substrate at positions corresponding to ends of the conductive traces;

wherein the first and second sets of conductive traces and the plurality of conductive vias together form a continuous spiral conductive path with desirable inductance properties;

forming two adjacent ranks of the first and second sets of parallel conductive traces wherein the first set of traces in one rank is formed coplanar with the first set of traces in the other rank, and the second set of traces in one rank is fromed coplanar with the second set of traces in the other rank so that the first and second sets of traces for both of the two ranks are contained in the same two parallel planes.

6. A method as defined in claim 5, and further comprising:

forming additional parallel conductive traces on the upper and lower faces of the substrate and additional conductive vias through the substrate, wherein the additional conductive traces and the additional vias together form a second continuous spiral conductive path closely adjacent to the continuous spiral conductive path formed by the first and second sets of conductive traces; and

forming an electrical connection between the continuous spiral conductive paths, thereby connecting them electrically in series in such a way that current flowing through the two spiral conductive paths will produce oppositely directed magnetic flux fields through the two adjacent spiral paths;

wherein the oppositely directed magnetic flux fields closely couple to each other at ends of the spiral paths, to produce a tightly coupled magnetic circuit and high values of inductance with a rapidly increasing and contourable low frequency Q factor.

7. A method as defined in claim 5, wherein:

the steps of forming the second set of conductive traces comprises forming the second set to be parallel with each other but not with the first set of conductive traces, wherein opposite ends of each trace in the second set are located near adjacent traces in the first set; and

the step of forming vias comprises forming vias that are substantially normal to the upper and lower faces of the substrate, wherein each via connects a conductive trace in the first set to an adjacent conductive trace in the second set.

8. A method as defined in claim 5, and further comprising:

forming additional dielectric layers over the first and second conductive traces.

9. A method as defined in claim 5, and further comprising:

forming a connecting trace in the second set of traces in one rank disposed to form a last trace near a distal edge of the one rank, the connecting trace having an end that extends within the second plane into the other rank;

connecting a via in the second rank to the end of the connecting trace to form an electrical connection between the first and second ranks.