Semiconductor apparatus

• US 20060176137A1
• Filed: 01/24/2006
• Published: 08/10/2006
• Est. Priority Date: 01/24/2005
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Kanto Sanyo Semiconductors Company Limited (Panasonic Holdings Corporation), Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Inventors: Sato, Akihiro, Sekiguchi, Satoru, Mita, Kiyoshi, Tsubonoya, Makoto, Nabeta, Yoichi, Kamado, Kiyokazu
• Granted Patent: US 7,365,628 B2
• Time in Patent Office: Days
• US Class Current: 336/200
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48228 the bond pad being disposed in a recess of the surface of the item
• CPC Class Codes: H01L 2224/48465 the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 2224/49171 Fan-out arrangements
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 23/3121 a substrate forming part of the encapsulation
• CPC Class Codes: H01L 23/49822 Multilayer substrates multilayer metallisation on monolayer substrate H01L23/498
• CPC Class Codes: H01L 23/49838 Geometry or layout
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 23/645 Inductive arrangements H01L23/647, H01L23/66 take precedence
• CPC Class Codes: H01L 24/32 of an individual layer connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 24/73 Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/07802 : not being an ohmic electrical conductor
• CPC Class Codes: H01L 2924/12034 : Varactor
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19015 : including thin film passive components
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H01L 2924/19105 : in a side-by-side arrangement on a common die mounting substrate
• CPC Class Codes: H01L 2924/207 : Diameter ranges
• CPC Class Codes: H01L 2924/30107 : Inductance
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: H01L 2924/3512 : Cracking
• CPC Class Codes: H03J 2200/10 : Tuning of a resonator by means of digitally controlled capacitor bank

Abstract

A semiconductor apparatus having a semiconductor chip, a first coil electrically connected to the semiconductor chip and a first electrode electrically connected to the first coil is comprised of a second electrode which can be electrically connected to the first electrode as well as which can be electrically connected to a second coil on the outside of the semiconductor apparatus, and is characterized by that inductance composed of the first coil and the second coil is obtained by electrically connecting the second electrode to the first electrode and the second coil.

Claims

1. A semiconductor apparatus comprising:

a semiconductor chip;

a first coil electrically connected to the semiconductor chip;

a first electrode electrically connected to the first coil; and

a second electrode electrically connectable to the first electrode, the second electrode electrically connectable to a second coil on the outside of the semiconductor apparatus,

wherein the second electrode is electrically connected to the first electrode and the second coil to obtain inductance composed of the first coil and the second coil.

2. A semiconductor apparatus comprising:

a substrate;

a semiconductor chip disposed on one side of the substrate;

a first coil formed in a spiral shape on the other side of the substrate and electrically connected to the semiconductor chip;

a first electrode formed on the other side of the substrate and electrically connected to the first coil; and

a second electrode formed on the other side of the substrate and electrically connectable to the first electrode, the second electrode electrically connectable to a second coil on the outside of the semiconductor apparatus,

wherein the second electrode is electrically connected to the first electrode and the second coil to obtain inductance composed of the first coil and the second coil.

3. The semiconductor apparatus of claim 2, further comprising a conductive pattern formed on a surface facing to the semiconductor chip on the one side of the substrate for stabilizing an inductance characteristic of the first coil.

4. The semiconductor apparatus of claim 3, wherein the semiconductor chip is fixedly secured to the conductive pattern via an insulating adhesive.

5. The semiconductor apparatus of claim 3, wherein the conductive pattern includes a plurality of isolated conductive patterns in a predetermined shape spaced apart from one another by predetermined gaps.

6. The semiconductor apparatus of claim 5, wherein the conductive pattern includes a plurality of isolated conductive patterns in a substantially rectangular shape arranged such that the predetermined gaps extend substantially linearly and cross at angles with each other.

7. The semiconductor apparatus of claim 6, wherein the semiconductor chip is rectangular, and

wherein the plurality of predetermined gaps crossing substantially linearly are disposed so as to define predetermined angles against an external edge of the semiconductor chip.

9. The semiconductor apparatus of claim 2, wherein the first coil is a rolled conductive foil fixedly secured to the other side of the substrate.

8. The semiconductor apparatus of clam 2, further comprising:

a through-hole extending between the one side and the other side of the substrate and electrically connecting the semiconductor chip and the first electrode; and

an insulating resin covering the one side of the substrate.

10. A semiconductor apparatus, comprising:

a substrate;

a semiconductor chip disposed on one side of the substrate;

a first coil in a spiral shape formed on a surface of the one side of the substrate facing to the semiconductor chip, the first coil electrically connected to the semiconductor chip;

a first electrode formed on a surface of the other side of the substrate and electrically connected to the first coil; and

a second electrode formed on a surface of the other side of the substrate and electrically connectable to the first electrode, the second electrode electrically connectable to the second coil on the outside of the semiconductor apparatus,

wherein the second electrode is electrically connected to the first electrode and the second coil to obtain inductance composed of the first coil and the second coil.

11. The semiconductor apparatus of claim 10, further comprising a conductive pattern formed on a surface of the other side of the substrate opposite to the first coil for stabilizing an inductance characteristic of the first coil.

12. The semiconductor apparatus of claim 10, wherein the semiconductor chip is fixedly secured to the substrate via an insulating adhesive.

13. The semiconductor apparatus of claim 11, further comprising a plurality of electrodes formed on a surface of the other side of the substrate for maintaining the conductive pattern to the same voltage.

14. The semiconductor apparatus of claim 13, wherein the plurality of electrodes are grounded.

15. The semiconductor apparatus of claim 10,

wherein the first coil is composed of a third coil and a fourth coil, and

wherein the third coil and the fourth coil have a line-symmetry shape relative to a boundary dividing a surface of the substrate facing to the semiconductor chip in two.

16. The semiconductor apparatus of claim 11, further comprising:

an auxiliary conductive pattern intervening between the semiconductor chip on the one side of the substrate and the insulating adhesive for stabilizing an inductance characteristic of the first coil.

17. The semiconductor apparatus of claim 11, further comprising:

a through-hole extending between the one side and the other side of the substrate and electrically connecting the first coil and the first electrode; and

an insulating resin covering the one side of the substrate.

18. The semiconductor apparatus of claim 11, wherein the first coil is a rolled conductive foil fixedly secured to a surface of the one side of the substrate.