System and method of transmitting video data

• US 20060176241A1
• Filed: 04/01/2005
• Published: 08/10/2006
• Est. Priority Date: 09/27/2004
• Status: Abandoned Application

• Current Assignee: Snaptrack Incorporated (Qualcomm, Inc.)
• Original Assignee: Snaptrack Incorporated (Qualcomm, Inc.)
• Inventors: Sampsell, Jeffrey B.
• Application Number:
  US11/097,818
• Publication Number:
  US 20060176241A1
• Time in Patent Office: Days
• US Class Current: 345/2.100
• CPC Class Codes: G09G 2300/0473 Use of light emitting or modulating elements having two or more stable states when no power is applied
• CPC Class Codes: G09G 2310/0224 Details of interlacing
• CPC Class Codes: G09G 2310/0275 Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current
• CPC Class Codes: G09G 2310/04 Partial updating of the display screen
• CPC Class Codes: G09G 2340/0435 Change or adaptation of the frame rate of the video stream
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: G09G 3/34 by control of light from an independent source
• CPC Class Codes: G09G 3/3466 based on interferometric effect
• CPC Class Codes: G09G 5/006 Details of the interface to the display terminal specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04

Abstract

One embodiment comprises a system and method of transmitting video data to an array driver bypassing a processor, e.g., a central processing unit. In one embodiment, the transmitted data that bypasses the processor is targeted for display in a particular region of the display. In one embodiment, the size, location, and refresh rate of region is definable by a server or the processor, e.g., application software executing on the processor. In another embodiment, the processor has two communication paths for transmitting video to a display array. The first communication path connects the processor to an array driver. The second communication path connects the processor to a driver controller. In one embodiment, the data that is transmitted to each of the paths targeted for presentation on a selected region of the display. In one embodiment, the size, location, and refresh rate of each of the regions is definable by a server or the processor, e.g., application software executing on the processor.

Claims

1. A system, comprising:

an array of bi-stable display elements, the array being logically partitioned into at least a first group of bi-stable display elements and a second group of bi-stable display elements;

an array driver configured to control the bi-stable display elements;

a central processing unit configured to transmit video data to the array driver for display via the first group of bi-stable display elements; and

a network interface configured to receive video data and control information, the network interface configured to determine, based upon the control information, whether to transmit the video data to the array driver for display or to the central processing unit, wherein the video data that is transmitted to the array driver directly from the network interface is displayed via the second group of bi-stable display elements.

2. The system of claim 1, wherein the control information defines the size of the logical partitions of the first group of bi-stable display elements and the second group of bi-stable display elements.

3. The system of claim 1, wherein the control information defines a refresh rate of the logical partition of the first group of bi-stable display elements or the second group of bi-stable display elements.

4. The system of claim 1, wherein the control information defines an interlace or progressive display mode of the logical partition of the first group of bi-stable display elements or the second group of bi-stable display elements.

8. The method of claim 4, additionally comprising transmitting the video data directly to the processor.

5. A method of displaying video data, the method comprising:

receiving, in an electronic device, video data from a network; and

determining whether to transmit the video data directly to a array driver or to a processor.

6. The method of claim 5, wherein determining whether to transmit video data directly to the array driver or the central processing unit comprises reading control information in the video data specifying a transmission route.

7. The method of claim 5, additionally comprising transmitting the video data directly to the array driver.

9. A system of displaying video data, the system comprising:

means for receiving, in an electronic device, video data from a network; and

means for determining whether to transmit the video data directly to the array driver or to a processor.

10. The system of claim 9, wherein the means for determining whether to transmit video data directly to the array driver or the central processing unit comprises means for reading control information in the video data specifying a transmission route.

11. The system of claim 9, additionally comprising means for transmitting the video data directly to the array driver.

12. The system of claim 9, additionally comprising means for transmitting the video data directly to the processor.

13. A method of displaying video data, the method comprising:

receiving, in an electronic device, video data from a network; and

transmitting, independently of a central processing unit in the electronic device, the video data to an array driver in the electronic device.

14. The method of claim 13, additionally comprising:

displaying the transmitted video data via a selected group of bi-stable display elements in a display array, the selected group being defined by control information in the video data.

15. A system for displaying video data, the system comprising:

means for receiving, in an electronic device, video data from a network; and

means for transmitting, independently of a central processing unit in the electronic device, the video data directly to an array driver in the electronic device.

16. The system of claim 15, additionally comprising:

means for displaying the transmitted video data via a selected group of bi-stable display elements in a display array, the selected group being defined by control information in the video data.

17. A system, comprising:

an array of bi-stable display elements;

an array driver configured to control the bi-stable display elements;

a serial bus configured to transmit data to the array driver for display via a first portion of the bi-stable display elements;

a parallel bus configured to transmit data to the array driver for display via a second portion of the bi-stable display elements; and

a central processing unit configured to receive video data and control information, the central processing unit configured to determine, based upon the control information, whether to transmit the video data to the array driver via the serial bus or the parallel bus.

18. The system of claim 17, wherein the control information defines the size of the first portion of bi-stable display elements and the second portion of bi-stable display elements.

19. The system of claim 17, wherein the control information defines the location of the first portion of bi-stable display elements and the second portion of bi-stable display elements.

20. The system of claim 17, wherein the control information defines a refresh rate of the first portion of bi-stable display elements or the second portion of bi-stable display elements.

21. A method of displaying video data, the method comprising:

receiving, in an electronic device, video data from a network; and

determining whether to transmit the video data to an array driver in the electronic device via either a serial or a parallel bus.

22. The method of claim 21, additionally comprising receiving control information defining a communication route.