Method and system for programming and driving active matrix light emitting devcie pixel

• US 20060176250A1
• Filed: 12/07/2005
• Published: 08/10/2006
• Est. Priority Date: 12/07/2004
• Status: Active Grant

• Current Assignee: IGNIS Innovation Incorporated
• Original Assignee: IGNIS Innovation Incorporated
• Inventors: Chaji, Gholamreza Reza, Servati, Peyman, Nathan, Arokia
• Granted Patent: US 7,800,565 B2
• Time in Patent Office: Days
• US Class Current: 345/76
• CPC Class Codes: G09G 2300/0465 Improved aperture ratio, e.g. by size reduction of the pixel circuit, e.g. for improving the pixel density or the maximum displayable luminance or brightness
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0852 being a dynamic memory with more than one capacitor
• CPC Class Codes: G09G 2310/0262 The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
• CPC Class Codes: G09G 2310/06 Details of flat display driving waveforms
• CPC Class Codes: G09G 2310/061 for resetting or blanking
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3258 with pixel circuitry controlling the voltage across the light-emitting element
• CPC Class Codes: G09G 3/3696 Generation of voltages supplied to electrode drivers

Abstract

Method and system for programming and driving active matrix light emitting device pixel is provided. The pixel is a voltage programmed pixel circuit, and has a light emitting device, a driving transistor and a storage capacitor. The pixel has a programming cycle having a plurality of operating cycles, and a driving cycle. During the programming cycle, the voltage of the connection between the OLED and the driving transistor is controlled so that the desired gate-source voltage of a driving transistor is stored in a storage capacitor.

Claims

1. A method of programming and driving a display system, the display system includes:

a display array having a plurality of pixel circuits arranged in row and column, each pixel circuit having;

a light emitting device having a first terminal and a second terminal, the first terminal of the lighting device being connected to a voltage supply electrode;

a capacitor having a first terminal and a second terminal;

a switch transistor having a gate terminal, a first terminal and a second terminal, the gate terminal of the switch transistor being connected to a select line, the first terminal of the switch transistor being connected to a signal line for transferring voltage data, the second terminal of the switch transistor being connected to the first terminal of the capacitor; and

a driving transistor having a gate terminal, a first terminal and a second terminal, the gate terminal of the driving transistor being connected to the second terminal of the switch transistor and the first terminal of the capacitor at a first node (A), the first terminal of the driving transistor being connected to the second terminal of the light emitting device and the second terminal of the capacitor at a second node (B), the second terminal of the driving transistor being connected to a controllable voltage supply line;

a driver for driving the select line, the controllable voltage supply line and the signal line to operate the display array;

the method comprising the steps of;

at a programming cycle,

at a first operating cycle, charging the second node at a first voltage defined by (VREF−

VT) or (−

VREF+VT), where VREF represents a reference voltage and VT represents a threshold voltage of the driving transistor;

at a second operating cycle, charging the first node at a second voltage defined by (VREF+VP) or (−

VREF+VP) so that the difference between the first and second voltages is stored in the storage capacitor, where VP represents a programming voltage;

at a driving cycle, applying the voltage stored in the storage capacitor to the gate terminal of the driving transistor.

2. A method according to claim 1, wherein a light emitting device is an organic light emitting diode.

3. A method according to claim 1, wherein at least one of the transistors is a thin film transistor.

4. A method according to claim 1, wherein the programming cycle and the driving cycle are consecutively implemented for each row.

5. A method of programming and driving a display system, the display system includes:

a display array having a plurality of pixel circuits arranged in row and column, each pixel circuit having;

a light emitting device having a first terminal and a second terminal, the first terminal of the lighting device being connected to a voltage supply electrode;

a first capacitor and a second capacitor, each having a first terminal and a second terminal;

a first switch transistor having a gate terminal, a first terminal and a second terminal, the gate terminal of the first switch transistor being connected to a first select line, the first terminal of the first switch transistor being connected to the second terminal of the light emitting device, the second terminal of the first switch being connected to the first terminal of the first capacitor;

a second switch transistor having a gate terminal, a first terminal and a second terminal, the gate terminal of the second switch transistor being connected to a second select line, the first terminal of the second switch transistor being connected to a signal line for transferring voltage data;

a driving transistor having a gate terminal, a first terminal and a second terminal, the first terminal of the driving transistor being connected to the second terminal of the light emitting device at a first node (A), the gate terminal of the driving transistor being connected to the second terminal of the first switch transistor and the first terminal of the first capacitor at a second node (B), the second terminal of the driving transistor being connected to a controllable voltage supply line;

the second terminal of the second switch transistor being connected to the second terminal of the first capacitor and the first terminal of the second capacitor at a third node (C);

a driver for driving the first and second select line, the controllable voltage supply line and the signal line to operate the display array;

the method comprising the steps of;

at a programming cycle,

at a first operating cycle, controlling the voltage of each of the first node and the second node so as to store (VT+VP) or −

(VT+VP) in the first storage capacitor, where VT represents a threshold voltage of the driving transistor, VP represents a programming voltage;

at a second operating cycle, discharging the third node;

at a driving cycle, applying the voltage stored in the storage capacitor to the gate terminal of the driving transistor.

6. A method according to claim 5, wherein a light emitting device is an organic light emitting diode.

7. A method according to claim 5, wherein at least one of the transistors is a thin film transistor.

8. A method according to claim 5, wherein the first and second select lines are a common select line.

9. A method according to claim 5, wherein the programming cycle and the driving cycle for a row is overlapped with the programming cycle and the driving cycle for an adjacent row.

10. A display system comprising:

a display array having a plurality of pixel circuits arranged in row and column, each pixel circuit having;

a light emitting device having a first terminal and a second terminal, the first terminal of the lighting device being connected to a voltage supply electrode;

a capacitor having a first terminal and a second terminal;

a switch transistor having a gate terminal, a first terminal and a second terminal, the gate terminal of the switch transistor being connected to a select line, the first terminal of the switch transistor being connected to a signal line for transferring voltage data, the second terminal of the switch transistor being connected to the first terminal of the capacitor; and

a driving transistor having a gate terminal, a first terminal and a second terminal, the gate terminal of the driving transistor being connected to the second terminal of the switch transistor and the first terminal of the capacitor at a first node (A), the first terminal of the driving transistor being connected to the second terminal of the light emitting device and the second terminal of the capacitor at a second node (B), the second terminal of the driving transistor being connected to a controllable voltage supply line;

a driver for driving the select line, the controllable voltage supply line and the signal line to operate the display array; and

a controller for implementing a programming cycle and a driving cycle on each row of the display array using the driver;

wherein the programming cycle includes a first operating cycle and a second operating cycle,

wherein at the first operating cycle, the second node is charged at a first voltage defined by (VREF−

VT) or (−

VREF+VT), where VREF represents a reference voltage and VT represents a threshold voltage of the driving transistor, at the second operating cycle, the first node is charged at a second voltage defined by (VREF+VP) or (−

VREF+VP) so that the difference between the first and second voltages is stored in the storage capacitor, where VP represents a programming voltage;

wherein at the driving cycle, the voltage stored in the storage capacitor is applied to the gate terminal of the driving transistor.

11. A display system according to claim 10, wherein a light emitting device is an organic light emitting diode.

12. A display system according to claim 10, wherein at least one of the transistors is a thin film transistor.

13. A display system according to claim 10, wherein the programming cycle and the driving cycle for a row is overlapped with the programming cycle and the driving cycle for an adjacent row.

14. A display system comprising:

a display array having a plurality of pixel circuits arranged in row and column, each pixel circuit having;

a light emitting device having a first terminal and a second terminal, the first terminal of the lighting device being connected to a voltage supply electrode;

a first capacitor and a second capacitor, each having a first terminal and a second terminal;

a first switch transistor having a gate terminal, a first terminal and a second terminal, the gate terminal of the first switch transistor being connected to a first select line, the first terminal of the first switch transistor being connected to the second terminal of the light emitting device, the second terminal of the first switch being connected to the first terminal of the first capacitor;

a second switch transistor having a gate terminal, a first terminal and a second terminal, the gate terminal of the second switch transistor being connected to a second select line, the first terminal of the second switch transistor being connected to a signal line for transferring voltage data;

a driving transistor having a gate terminal, a first terminal and a second terminal, the first terminal of the driving transistor being connected to the second terminal of the light emitting device at a first node (A), the gate terminal of the driving transistor being connected to the second terminal of the first switch transistor and the first terminal of the first capacitor at a second node (B), the second terminal of the driving transistor being connected to a controllable voltage supply line;

the second terminal of the second switch transistor being connected to the second terminal of the first capacitor and the first terminal of the second capacitor at a third node (C);

a driver for driving the first and second select line, the controllable voltage supply line and the signal line to operate the display array; and

a controller for implementing a programming cycle and a driving cycle on each row of the display array using the driver;

wherein the programming cycle includes a first operating cycle and a second operating cycle;

wherein at the first operating cycle, the voltage of each of the first node and the second node is controlled so as to store (VT+VP) or −

(VT+VP) in the first storage capacitor, where VT represents a threshold voltage of the driving transistor, VP represents a programming voltage, at the second operating cycle, the third node is discharged;

wherein at the driving cycle, the voltage stored in the storage capacitor is applied to the gate terminal of the driving transistor.

15. A display system according to claim 14, wherein a light emitting device is an organic light emitting diode.

16. A display system according to claim 14, wherein at least one of the transistors is a thin film transistor.

17. A display system according to claim 14, wherein the first and second select lines are a common select line.

18. A display system according to claim 14, wherein the programming cycle and the driving cycle for a row is overlapped with the programming cycle and the driving cycle for an adjacent row.