Adaptive equalizer circuit

• US 20060176946A1
• Filed: 07/25/2005
• Published: 08/10/2006
• Est. Priority Date: 02/10/2005
• Status: Active Grant

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Yamaguchi, Hisakatsu
• Granted Patent: US 7,535,956 B2
• Time in Patent Office: Days
• US Class Current: 375/232
• CPC Class Codes: H04L 2025/03681 Control of adaptation
• CPC Class Codes: H04L 2025/03789 Codes therefore
• CPC Class Codes: H04L 25/03885 adaptive

Abstract

An adaptive equalizer circuit equipped by a control unit for controlling an equalizer circuit, comprising a detection unit for detecting an identity of a preset data pattern with a data pattern as a result of data judgment for an output of the equalizer circuit, a monitor unit for sequentially monitoring an input to a gain amplifier for each of a plurality of filters constituting the equalizer circuit and an output thereof every time the identity detection unit detects an identity, and a unit for making the control unit operate an adaptive equalization control by providing the control unit with the monitoring result, thereby making it possible to track a great change in a characteristic of transmission line without using a matrix responding to the characteristic of the transmission line or a convolution operation by using the matrix.

Claims

1. An adaptive equalization circuit equipped by an adaptive equalization control unit for controlling an equalizer circuit which equalizes an equalization object signal, comprising:

an identity detection unit for detecting an identity of a preset data pattern with a data pattern as a result of data judgment for an output of the equalizer circuit;

a monitor unit for sequentially monitoring an output of the equalizer circuit and inputs to a plurality of gain amplifiers for respective filters constituting the equalizer circuit, every time the identity detection unit detects the aforementioned identity of data patterns; and

an operation control unit for making the adaptive equalization control unit operate an adaptive equalization control by providing the adaptive equalization control unit with the result of monitoring, i.e., the output of the equalizer circuit, the inputs to the plurality of gain amplifiers, performed by the monitor unit.

2. The adaptive equalization circuit according to claim 1, wherein said preset data pattern and a length thereof are variable.

3. The adaptive equalization circuit according to claim 1, wherein said equalization object signal is a data receiving signal transmitted by a data transmitter and said adaptive equalization circuit carries out an adaptive equalization for the data receiving signal.

4. The adaptive equalization circuit according to claim 1, wherein said adaptive equalization control unit is comprised by a logic circuit and said monitor unit comprises an analog/digital converter.

5. The adaptive equalization circuit according to claim 1, further comprising a plurality of monitor result hold units for temporarily holding respective results of monitoring by said monitor unit, wherein

said operation control unit comprises a switch unit for giving data held by all of the plurality of monitor result hold units to said adaptive equalization control unit.

6. An adaptive equalization circuit equipped by an adaptive equalization control unit for controlling an equalizer circuit which equalizes an equalization object signal, comprising:

a plurality of storage units for storing input values for a plurality of gain amplifiers for respective filters constituting the equalizer circuit vis-a-vis a preset data pattern;

an identity detection unit for detecting an identity of the preset data pattern with a data pattern as a result of data judgment for an output of the equalizer circuit;

an operation control unit for making the adaptive equalization control unit operate an adaptive equalization control by using a storage content of the plurality of storage units by providing the adaptive equalization control unit with a predicted amplitude for control in response to the identity detection unit detecting an identity of data pattern.

7. The adaptive equalization circuit according to claim 6, wherein said preset data pattern and a length thereof are variable.

8. The adaptive equalization circuit according to claim 6, wherein said equalization object signal is a data receiving signal transmitted by a data transmitter and said adaptive equalization circuit carries out an adaptive equalization for the data receiving signal.

9. The adaptive equalization circuit according to claim 6, wherein said adaptive equalization control unit is comprised by a logic circuit, and said plurality of storage units stores digital values of inputs to gain amplifiers for said respective filters.

10. An adaptive equalization circuit equipped by an adaptive equalization control unit for controlling an equalizer circuit which equalizes an equalization object signal, comprising:

a monitor unit for directly monitoring inputs to a plurality of gain amplifiers for respective filters constituting the equalizer circuit to provide the adaptive equalization control unit with a result of monitoring.