System of intra-picture complexity preprocessing

• US 20060176952A1
• Filed: 02/08/2005
• Published: 08/10/2006
• Est. Priority Date: 02/08/2005
• Status: Active Grant

• Current Assignee: VIXS Systems Incorporated (Pixelworks Incorporated)
• Original Assignee: VIXS Systems Incorporated (Pixelworks Incorporated)
• Inventors: Zeng, Steve Zhihua
• Granted Patent: US 7,609,766 B2
• Time in Patent Office: Days
• US Class Current: 375/240.200
• CPC Class Codes: H04N 19/112 according to a given display mode, e.g. for interlaced or progressive display mode
• CPC Class Codes: H04N 19/14 Coding unit complexity, e.g. amount of activity or edge presence estimation H04N19/146 takes precedence
• CPC Class Codes: H04N 19/176 the region being a block, e.g. a macroblock
• CPC Class Codes: H04N 19/42 characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation H04N19/635 takes precedence
• CPC Class Codes: H04N 19/60 using transform coding

Abstract

A system having a video pipeline that includes a variation calculation portion is disclosed. The variance calculation portion calculates a plurality of variance values for a macroblock. A DCT-type indicator for the macroblock is determined based upon the plurality of variance values.

Claims

1. A method comprising:

receiving a first set of data representing a first portion of a video picture to be compressed;

determining a first plurality of variation values, wherein each variation value is based upon a corresponding subset of the first set of data; and

determining a DCT type based upon the first plurality of variation values.

2. The method of claim 1 wherein determining the DCT type based upon the plurality of variation values comprises determining the DCT type based upon a comparison of a first variation value of the plurality of variation values to a second variation value of the first plurality of variation values.

3. The method of claim 1, wherein the first plurality of variation values comprises a frame variation value based on a first subset of the first set of data and a field variation value based on a second subset of the first set of data.

4. The method of claim 1, wherein the first plurality of variation values comprises a first field variation value based on a first subset of the first set of data and a second field variation value based on a second subset of the first set of data.

5. The method of claim 1, further comprising:

providing at least one variation value to be stored in memory, the at least one variation value based on at least one of the plurality of variation values.

6. The method of claim 5, wherein the at least one variation value is unsigned and is represented by an odd number of bits.

7. The method of claim 6, further comprising:

providing an indicator of the DCT type to be stored in memory.

8. The method of claim 7, wherein the indicator of the DCT type and the at least one variation value are stored simultaneously.

9. The method of claim 7, wherein the indicator of the DCT type and the one variation value are stored in a common data word.

10. The method of claim 1, wherein receiving the first set of data comprises receiving the first set of data at a first stage of a pipeline from a second stage of the pipeline.

11. The method of claim 10, wherein the second stage of the pipeline comprises a video scaler.

12. The method of claim 10, wherein the second stage of the pipeline comprises a noise reduction filter.

13. The method of claim 10 further comprising identifying the second stage of the pipeline as one of a third stage of the pipeline and a fourth stage of the pipeline.

14. The method of claim 13, wherein identifying the second stage further comprises reading a value from a memory location to identify the second stage.

15. A method comprising:

receiving a plurality of video macroblocks from memory during a first time period;

processing the plurality of video macroblocks at a first stage of a pipeline during a second time frame to generate a plurality of first modified macroblocks;

processing the plurality of first modified macroblocks at a second stage of the pipeline during a third time to determine a plurality of variation values for each macroblock.

16. The method of claim 15, wherein processing the plurality of video macroblocks at the first stage of the pipeline operates on N macroblocks, wherein N is a positive integer greater than 1.

17. A system comprising:

a first stage of a pipeline comprising an input to receive a first set of data representing a portion of a video picture and an output to provide a second set of data representing the portion of a video picture based upon the first set of data; and

a second stage of the pipeline comprising an input coupled to the output of the first stage to receive the second set of data, and an output, the second stage of the pipeline comprising;

a first portion to determine one or more field variation values of the second set of data; and

a second portion to determine one or more frame variation values of the second set of data.

18. The system of claim 17, wherein the first portion is to determine a plurality of field variation values based on the second set of data and the second portion is to determine a plurality of frame variation values based on the second set of data.

19. The system of claim 18 further comprising:

a third portion coupled to the first module and to the second module to receive variance values, and to provide an indicator to control compression of the second set of data.

20. The system of claim 17 further comprising:

a memory comprising an output to provide a third set of data representing the portion of the video picture to the pipeline, wherein the first set of data is one of the same as the third set of data or a representation of the third set of data.

21. The system of claim 20 wherein the output of the first module is coupled to the memory to provide the second set of data to an input of the memory.

22. A system comprising:

a memory capable of transferring N-bits of information simultaneously;

a processing module coupled to the memory to receive video information representative of a portion of a video picture, and to provide a X-bit value representing a variance calculation based on the portion of the video picture, and a Y-bit value indicating a type of compression to be applied to the portion of the video picture, wherein X, Y, and N are integers, and the sum of X and Y is less than or equal to N.

23. The system of claim 22, wherein the processing module is further to provide the Y-bit value where the Y-bit value is a one bit value.

24. The system of claim 22, wherein the memory is capable of transferring 16 or more bits of information simultaneously.