Methods of forming semiconductor devices with high-k gate dielectric

• US 20060177997A1
• Filed: 03/16/2006
• Published: 08/10/2006
• Est. Priority Date: 08/11/2003
• Status: Active Grant

• Current Assignee: Chenming Hu, Chih-Hao Wang, Chun-Chieh Lin, Fu-Liang Yang, Shang-Chih Chen, Wen-Chin Lee, Yee-Chia Yeo
• Original Assignee: Chenming Hu, Chih-Hao Wang, Chun-Chieh Lin, Fu-Liang Yang, Shang-Chih Chen, Wen-Chin Lee, Yee-Chia Yeo
• Inventors: Yeo, Yee-Chia, Lee, Wen-Chin, Yang, Fu-Liang, Hu, Chenming, Lin, Chun-Chieh, Wang, Chih-Hao, Chen, Shang-Chih
• Granted Patent: US 7,354,830 B2
• Time in Patent Office: Days
• US Class Current: 438/584
• CPC Class Codes: H01L 21/28185 with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
• CPC Class Codes: H01L 21/28194 by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition H01L21/28202 takes precedence
• CPC Class Codes: H01L 21/28202 in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
• CPC Class Codes: H01L 21/823462 with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material

Abstract

A method of fabricating an integrated circuit is provided. A first gate dielectric portion is formed on a substrate in a first transistor region. The first gate dielectric portion includes a first high-permittivity dielectric material. The first gate dielectric portion has a first equivalent silicon oxide thickness. A second gate dielectric portion is formed on the substrate in a second transistor region. The second gate dielectric portion includes the first high-permittivity dielectric material. The second gate dielectric portion has a second equivalent silicon oxide thickness. The second equivalent silicon oxide thickness is different than the first equivalent silicon oxide thickness.

Claims

1. A method of fabricating an integrated circuit comprising:

forming a first gate dielectric portion on a substrate in a first transistor region, the first gate dielectric portion comprising a first high-permittivity dielectric material, and the first gate dielectric portion having a first equivalent silicon oxide thickness; and

forming a second gate dielectric portion on the substrate in a second transistor region, the second gate dielectric portion comprising the first high-permittivity dielectric material, and the second gate dielectric portion having a second equivalent silicon oxide thickness, wherein the second equivalent silicon oxide thickness is different than the first equivalent silicon oxide thickness.

2. The method of claim 1, wherein the forming of the first and second gate dielectric portions comprises:

forming a normal-permittivity dielectric material over the substrate in the first and second transistor regions;

removing at least part of the normal-permittivity dielectric material from the first transistor region; and

forming the first high-permittivity dielectric material over the substrate, wherein the first high-permittivity dielectric material overlies the normal-permittivity dielectric material remaining in the second transistor region.

3. The method of claim 1, wherein the forming of the first and second gate dielectric portions comprises:

forming a normal-permittivity dielectric material over the substrate in the first and second transistor regions;

removing part of the normal-permittivity dielectric material from the first transistor region such that the normal-permittivity dielectric material in the first transistor region has a first normal-permittivity-material thickness, the normal-permittivity dielectric material in the second transistor region has a second normal-permittivity-material thickness, and the first normal-permittivity-material thickness is less than the second normal-permittivity-material thickness; and

forming the first high-permittivity dielectric material over the substrate, wherein the first high-permittivity dielectric material overlies the normal-permittivity dielectric material remaining in the first and second transistor regions.

4. The method of claim 1, wherein the forming of the first and second gate dielectric portions comprises:

forming a second high-permittivity dielectric material over the substrate in the first and second transistor regions;

removing part of the second high-permittivity dielectric material from the first transistor region such that the second high-permittivity dielectric material in the first transistor region has a first high-permittivity-material thickness, the second high-permittivity dielectric material in the second transistor region has a second high-permittivity-material thickness, and the first high-permittivity-material thickness is less than the second high-permittivity-material thickness; and

forming the first high-permittivity dielectric material over the substrate, wherein the first high-permittivity dielectric material overlies the second high-permittivity dielectric material remaining in the first and second transistor regions.

5. The method of claim 1, wherein the forming of the first and second gate dielectric portions comprises:

forming a second high-permittivity dielectric material over the substrate in the first and second transistor regions;

removing at least part of the second high-permittivity dielectric material from the first transistor region; and

forming the first high-permittivity dielectric material over the substrate, wherein the first high-permittivity dielectric material overlies the second high-permittivity dielectric material remaining in the second transistor region.

6. The method of claim 5, wherein the forming of the first and second gate dielectric portions further comprises:

forming a normal-permittivity dielectric material over the substrate in the first and second transistor regions prior to the forming of the second high-permittivity dielectric material, such that the normal-permittivity dielectric material is located between the second high-permittivity dielectric material and the substrate.

7. The method of claim 1, wherein the forming of the first and second gate dielectric portions comprises:

forming a normal-permittivity dielectric material over the substrate in the first and second transistor regions;

removing at least part of the normal-permittivity dielectric material from the second transistor region;

forming a second high-permittivity dielectric material over the substrate in the first and second transistor regions;

removing at least part of the second high-permittivity dielectric material from the first transistor region; and

forming the first high-permittivity dielectric material over the substrate, wherein the first high-permittivity dielectric material overlies the second high-permittivity dielectric material remaining in the second transistor region and overlies the normal-permittivity dielectric material remaining in the first transistor region.

8. The method of claim 1, wherein the forming of the first and second gate dielectric portions comprises:

forming a normal-permittivity dielectric material over the substrate in the first and second transistor regions;

removing at least part of the normal-permittivity dielectric material from the first transistor region;

forming a second high-permittivity dielectric material over the substrate in the first and second transistor regions, wherein the second high-permittivity dielectric material overlies the normal-permittivity dielectric material remaining in the second transistor region;

removing at least part of the second high-permittivity dielectric material from the first transistor region; and

forming the first high-permittivity dielectric material over the substrate, wherein the first high-permittivity dielectric material overlies the second high-permittivity dielectric material and the normal-permittivity dielectric material remaining in the second transistor region.

9. The method of claim 1, wherein the forming of the first and second gate dielectric portions comprises:

forming the first high-permittivity dielectric material over the substrate in the first and second transistor regions; and

removing part of the first high-permittivity dielectric material from the first transistor region such that the first high-permittivity dielectric material in the first transistor region has a first high-permittivity-material thickness, the first high-permittivity dielectric material in the second transistor region has a second high-permittivity-material thickness, and the first high-permittivity-material thickness is less than the second high-permittivity-material thickness.

10. The method of claim 9, wherein the forming of the first and second gate dielectric portions further comprises:

forming a normal-permittivity dielectric material over the substrate in the first and second transistor regions prior to the forming of the first high-permittivity dielectric material, such that the normal-permittivity dielectric material is located between the first high-permittivity dielectric material and the substrate.

11. The method of claim 9, wherein the forming of the first and second gate dielectric portions further comprises:

forming a normal-permittivity dielectric material over the substrate in the first and second transistor regions prior to the forming of the first high-permittivity dielectric material; and

removing at least part of the normal-permittivity dielectric material from the second transistor region prior to the forming of the first high-permittivity dielectric material.

12. The method of claim 9, wherein the forming of the first and second gate dielectric portions further comprises:

forming a normal-permittivity dielectric material over the substrate in the first and second transistor regions prior to the forming of the first high-permittivity dielectric material; and

removing at least part of the normal-permittivity dielectric material from the first transistor region prior to the forming of the first high-permittivity dielectric material.

13. The method of claim 1, wherein the forming of the first and second gate dielectric portions comprises:

forming a normal-permittivity dielectric material over the substrate in the first and second transistor regions;

forming a second high-permittivity dielectric material over the normal-permittivity dielectric material in the first and second transistor regions;

removing part of the second high-permittivity dielectric material from the first transistor region such that the second high-permittivity dielectric material in the first transistor region has a first high-permittivity-material thickness, the second high-permittivity dielectric material in the second transistor region has a second high-permittivity-material thickness, and the first high-permittivity-material thickness is less than the second high-permittivity-material thickness; and

forming the first high-permittivity dielectric material over the second high-permittivity dielectric material.

14. The method of claim 13, wherein the forming of the first and second gate dielectric portions further comprises:

removing part of the first high-permittivity dielectric material from the second transistor region such that the first high-pernittivity dielectric material in the second transistor region has a third high-permittivity-material thickness, the first high-permittivity dielectric material in the first transistor region has a fourth high-permittivity-material thickness, and the third high-permittivity-material thickness is less than the fourth high-permittivity-material thickness.

15. The method of claim 13, wherein the forming of the first and second gate dielectric portions further comprises:

removing at least part of the first high-permittivity dielectric material from the second transistor region.

16. A method of fabricating an integrated circuit comprising:

forming a first gate dielectric portion on a substrate in a first transistor region, the first gate dielectric portion comprising a first high-permittivity dielectric material; and

forming a second gate dielectric portion on the substrate in a second transistor region, the second gate dielectric portion comprising a second high-permittivity dielectric material, wherein the second high-permittivity dielectric material is different than the first high-permittivity dielectric material.

17. The method of claim 16, wherein the forming of the first and second gate dielectric portions comprises:

forming the second high-permittivity dielectric material over the substrate in the first and second transistor regions;

removing part of the second high-permittivity dielectric material from the first transistor region such that the second high-permittivity dielectric material in the first transistor region has a first high-permittivity-material thickness, the second high-permittivity dielectric material in the second transistor region has a second high-permittivity-material thickness, and the first high-permittivity-material thickness is less than the second high-permittivity-material thickness; and

forming the first high-permittivity dielectric material over the substrate, wherein the first high-permittivity dielectric material overlies the second high-permittivity dielectric material remaining in the first and second transistor regions.

18. The method of claim 16, wherein the forming of the first and second gate dielectric portions comprises:

forming the second high-permittivity dielectric material over the substrate in the first and second transistor regions;

removing at least part of the second high-permittivity dielectric material from the first transistor region; and

forming the first high-permittivity dielectric material over the substrate in the first and second transistor regions.

19. The method of claim 18, wherein the forming of the first and second gate dielectric portions further comprises:

prior to the forming of the first and second high-permittivity dielectric materials, forming a normal-permittivity dielectric material over the substrate in the first and second transistor regions, such that the normal-permittivity dielectric material is located between the second high-permittivity dielectric material and the substrate.

20. The method of claim 19, wherein the forming of the first and second gate dielectric portions further comprises:

removing at least part of the first high-permittivity dielectric material from the second transistor region.

21. The method of claim 16, wherein the forming of the first and second gate dielectric portions comprises:

forming the second high-permittivity dielectric material over the substrate in the first and second transistor regions;

removing at least part of the second high-permittivity dielectric material from the first transistor region;

forming the first high-permittivity dielectric material over the substrate in the first and second transistor regions; and

removing at least part of the first high-permittivity dielectric material from the second transistor region.

22. The method of claim 16, wherein the forming of the first and second gate dielectric portions comprises:

forming a normal-permittivity dielectric material over the substrate in the first and second transistor regions;

removing at least part of the normal-permittivity dielectric material from the second transistor region;

forming the second high-permittivity dielectric material over the substrate in the first and second transistor regions;

removing at least part of the second high-permittivity dielectric material from the first transistor region;

forming the first high-permittivity dielectric material over the substrate in the first and second transistor regions; and

removing at least part of the first high-permittivity dielectric material from the second transistor region.

23. The method of claim 16, wherein the forming of the first and second gate dielectric portions comprises:

forming a normal-permittivity dielectric material over the substrate in the first and second transistor regions;

removing at least part of the normal-permittivity dielectric material from the first transistor region;

forming the second high-permittivity dielectric material over the substrate in the first and second transistor regions;

removing at least part of the second high-permittivity dielectric material from the first transistor region;

forming the first high-permittivity dielectric material over the substrate in the first and second transistor regions; and

removing at least part of the first high-permittivity dielectric material from the second transistor region.

24. The method of claim 16, wherein the forming of the first and second gate dielectric portions comprises:

forming the first high-permittivity dielectric material over the substrate in the first and second transistor regions;

converting the first high-permittivity dielectric material in the second transistor region to the second high-permittivity dielectric material.

25. The method of claim 24, wherein the forming of the first and second gate dielectric portions further comprises:

prior to the forming of the first high-permittivity dielectric material, forming a normal-permittivity dielectric material over the substrate in the first and second transistor regions, such that the normal-permittivity dielectric material is located between the second high-permittivity dielectric material and the substrate.

26. The method of claim 25, wherein the forming of the first and second gate dielectric portions further comprises:

prior to the forming of the first high-permittivity dielectric material, removing at least part of the normal-permittivity dielectric material from the second transistor region.

27. The method of claim 25, wherein the forming of the first and second gate dielectric portions further comprises:

prior to the forming of the first high-permittivity dielectric material, removing at least part of the normal-permittivity dielectric material from the first transistor region.

28. A method of fabricating an integrated circuit comprising:

forming a first gate dielectric portion on a substrate in a first transistor region, the first gate dielectric portion comprising a first high-permittivity dielectric material, and the first gate dielectric portion having a first equivalent silicon oxide thickness; and

forming a second gate dielectric portion on the substrate in a second transistor region, the second gate dielectric portion comprising a second high-permittivity dielectric material, the second high-permittivity dielectric material being different than the first high-permittivity dielectric material, and the second gate dielectric portion having a second equivalent silicon oxide thickness, wherein the second equivalent silicon oxide thickness is different than the first equivalent silicon oxide thickness.