Dynamic power management via DIMM read operation limiter

• US 20060179334A1
• Filed: 02/09/2005
• Published: 08/10/2006
• Est. Priority Date: 02/09/2005
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Fields, James Stephen Jr., Maule, Warren Edward, Brittain, Mark Andrew, Cordero, Edgar Rolando, Retter, Eric Eugene
• Granted Patent: US 7,421,598 B2
• Time in Patent Office: Days
• US Class Current: 713/320
• CPC Class Codes: G06F 1/206 comprising thermal management
• CPC Class Codes: G06F 1/3225 of memory devices
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A method and system for enabling directed temperature/power management at the DIMM-level and/or DRAM-level utilizing intelligent scheduling of memory access operations received at the memory controller. Hot spots within the memory subsystem, caused by operating the DIMMs/DRAMs above predetermined/preset threshold power/temperature values for operating a DIMM and/or a DRAM, are avoided/controlled by logic within the memory controller. The memory controller logic throttles the number/frequency at which commands (read/write operations) are issued to the specific DIMM/DRAM based on feedback data received from the specific DIMM/DRAM reaching the preset threshold power usage value.

Claims

1. In a memory subsystem having a memory controller connected via a memory channel to multiple memory modules, a method comprising:

receiving information from the memory subsystem indicating a current power consumption of each of the multiple memory modules; and

controlling the level of power consumption within the memory subsystem and the individual memory components by intelligently scheduling the rate at which new operations are issued to the memory components.

2. The method of claim 1, further comprising:

calculating a current power consumption of the memory subsystem and individual memory components utilizing said information received along with one or more of a plurality of preset power consumption parameters stored within the memory controller, said parameters including one or more of;

(1) the power ratings of the memory

subsystem and each individual memory component, including the power rating of each memory module when a module-level tracking is implemented and the power rating of each memory device when a device-level tracking is implemented;

(2) the number and type of memory modules and the power consumption associated with each operational state of each memory module;

(3) the number and types of memory storage devices within each memory module and the power consumption associated with each operational state of each memory storage device;

wherein said calculating yields one or more of;

(1) a calculated current power consumption for the memory channel and memory controller;

(2) a calculated current power consumption at each memory module based on the number and frequency of issued operations to the specific memory module;

(3) a calculated current power consumption at each memory storage device within the memory module based on the number and frequency of issued operations addressed to the specific memory storage device.

3. The method of claim 2, wherein said power consumption information indicates a current operational state of the memory module from among a power down state, a standby state, and a processing/operating state, each consuming a different level of power, said method further comprising:

comparing the current power consumption information with preset threshold power consumptions for each component of the memory subsystem and for the memory subsystem as a whole;

dynamically adjusting the value of the current power consumption based on the power consumption information received from the memory subsystem and memory components; and

adjusting the stored operational parameters based on the received power consumption information, so that the stored operational parameters more accurately reflect actual operating conditions.

4. The method of claim 1, further comprising:

tracking the power consumption of the memory module; and

determining when the memory module is at or above a preset threshold maximum power for that memory module; and

throttling a rate of issuing new operations to that memory module until the memory module is no longer at or above a preset threshold maximum power for the memory module; and

enabling other operations to be issued to other memory modules that are not at or above their preset threshold maximum power, whereby utilization of the memory channel bandwidth and data bus bandwidth of the memory components across the memory subsystem are substantially maximized.

5. The method of claim 1, further comprising:

tracking the power consumption of each individual memory device within the memory modules; and

determining when an individual memory device is at or above a preset threshold maximum power for that memory device; and

throttling the number of new operations issued to that memory device until the memory device is no longer at or above a preset threshold maximum power for the memory device; and

enabling other operations to be issued to other memory devices that are not at or above their preset threshold maximum power, whereby utilization of the memory channel bandwidth and data bus bandwidth of the memory modules across the memory subsystem are substantially maximized.

6. The method of claim 1, wherein said controlling the level of power consumption further comprises:

calculating an average power consumption over a preset period of time; and

initiating said controlling of the level of power consumption based on a timed average, wherein the issuing of operations is not throttled until the average power consumption measured over the preset period of time exceeds a pre-established threshold average power consumption.

7. The method of claim 1, wherein said controlling the level of power usage comprises:

implementing one or more of a plurality of memory subsystem management functions via intelligent scheduling of operations, said functions including;

(1) managing a total power consumption of the memory subsystem;

(2) managing a power consumption for each memory module; and

(3) managing a power consumption for each memory device within each memory module; and

allocating sequential memory addresses across multiple memory modules in a granularity that allows access to consecutive memory addresses to hit different ones of the multiple memory modules.

10. The power management mechanism of claim 5, wherein said power consumption information indicates a current operational state of the memory module from among a power down state, a standby state, and a processing/operating state, each consuming a different level of power, said mechanism further comprising:

logic for comparing the current power consumption information with preset threshold power consumptions for each component of the memory subsystem and for the memory subsystem as a whole;

logic for dynamically adjusting the value of the current power consumption based on the power consumption information received from the memory subsystem and memory components; and

logic for adjusting the stored operational parameters based on the received power consumption information, so that the stored operational parameters more accurately reflect actual operating conditions.

8. A dynamic power management mechanism for a memory subsystem comprising:

logic for receiving information from the memory subsystem indicating a current power consumption of each of the multiple memory modules; and

controlling the level of power consumption within the memory subsystem and the individual memory components by intelligently scheduling the rate at which new operations are issued to the memory components.

9. The power management mechanism of claim 8, further comprising:

logic for calculating a current power consumption of the memory subsystem and individual memory components utilizing said information received along with one or more of a plurality of preset power consumption parameters stored within the memory controller, said parameters including one or more of;

(1) the power ratings of the memory subsystem and each individual memory component, including the power rating of each memory module when a module-level tracking is implemented and the power rating of each memory device when a device-level tracking is implemented;

(2) the number and type of memory modules and the power consumption associated with each operational state of each memory module;

(3) the number and types of memory storage devices within each memory module and the power consumption associated with each operational state of each memory storage device;

wherein said calculating yields one or more of;

(1) a calculated current power consumption for the memory channel and memory controller;

(2) a calculated current power consumption at each memory module based on the number and frequency of issued operations to the specific memory module;

(3) a calculated current power consumption at each memory storage device within the memory module based on the number and frequency of issued operations addressed to the specific memory storage device.

11. The power management mechanism of claim 8, further comprising:

logic for tracking the power consumption of the memory module;

logic for determining when the memory module is at or above a preset threshold maximum power for that memory module;

logic for throttling a rate of issuing new operations to that memory module until the memory module is no longer at or above a preset threshold maximum power for the memory module; and

logic for enabling other operations to be issued to other memory modules that are not at or above their preset threshold maximum power, whereby utilization of the memory channel bandwidth and data bus bandwidth of the memory components across the memory subsystem are substantially maximized.

12. The power management mechanism of claim 8, further comprising:

logic for tracking the power consumption of each individual memory device within the memory modules; and

logic for determining when an individual memory device is at or above a preset threshold maximum power for that memory device; and

logic for throttling the number of new operations issued to that memory device until the memory device is no longer at or above a preset threshold maximum power for the memory device; and

logic for enabling other operations to be issued to other memory devices that are not at or above their preset threshold maximum power, whereby utilization of the memory channel bandwidth and data bus bandwidth of the memory modules across the memory subsystem are substantially maximized.

13. The power management mechanism of claim 8, wherein said logic for controlling the level of power consumption further comprises:

logic for calculating an average power consumption over a preset period of time; and

logic for initiating said controlling of the level of power consumption based on a timed average, wherein the issuing of operations is not throttled until the average power consumption measured over the preset period of time exceeds a pre-established threshold average power consumption.

14. The power management mechanism of claim 8, wherein said logic controlling the level of power usage comprises:

logic for implementing one or more of a plurality of memory subsystem management functions via intelligent scheduling of operations, said functions including;

(1) managing a total power consumption of the memory subsystem;

(2) managing a power consumption for each memory module; and

(3) managing a power consumption for each memory device within each memory module; and

logic for allocating sequential memory addresses across multiple memory modules in a granularity that allows access to consecutive memory addresses to hit different ones of the multiple memory modules.

15. The power management mechanism of claim 8, further comprising:

a plurality of power usage sensors being utilized to detect when a memory component is consuming more than a preset threshold amount of power and provide the power consumption information to the memory controller to initiate a throttling of operations being issued to the memory component;

wherein plurality of power usage sensors are distributed throughout the memory subsystems and associated with memory components of the memory subsystem, and wherein;

when the power consumption of the memory modules is being monitored/controlled, the power usage sensors are located proximate to the individual memory modules; and

when the power consumption of the memory storage device is being monitored/controlled, the power usage sensors are located proximate to the individual memory storage devices on the memory modules; and

wherein the power usage sensors measures one or more of a temperature, voltage, and electrical current of a memory component being monitored.

16. A computer program product comprising:

a computer readable medium; and

program code on the computer readable medium for;

receiving information from the memory subsystem indicating a current power consumption of each of the multiple memory modules; and

controlling the level of power consumption within the memory subsystem and the individual memory components by;

intelligently scheduling the rate at which new operations are issued to the memory components; and

allocating sequential memory addresses across multiple memory modules in a granularity that allows access to consecutive memory addresses to hit different ones of the multiple memory modules;

wherein the intelligently scheduling includes implementing one or more of;

intelligently scheduling operations to manage (1) a total power consumption of the memory subsystem;

(2) a power consumption for each memory module; and

(3) a power consumption for each memory device within each memory module.

17. The computer program product of claim 16, further comprising code for:

calculating a current power consumption of the memory subsystem and individual memory components utilizing said information received along with one or more of a plurality of preset power consumption parameters stored within the memory controller, said parameters including one or more of;

(1) the power ratings of the memory

subsystem and each individual memory component, including the power rating of each memory module when a module-level tracking is implemented and the power rating of each memory device when a device-level tracking is implemented;

(2) the number and type of memory modules and the power consumption associated with each operational state of each memory module;

(3) the number and types of memory storage devices within each memory module and the power consumption associated with each operational state of each memory storage device;

wherein said calculating yields one or more of;

(1) a calculated current power consumption for the memory channel and memory controller;

(2) a calculated current power consumption at each memory module based on the number and frequency of issued operations to the specific memory module;

(3) a calculated current power consumption at each memory storage device within the memory module based on the number and frequency of issued operations addressed to the specific memory storage device.

18. The computer program product of claim 17, wherein said power consumption information indicates a current operational state of the memory module from among a power down state, a standby state, and a processing/operating state, each consuming a different level of power, said program code further comprising code for:

comparing the current power consumption information with preset threshold power consumptions for each component of the memory subsystem and for the memory subsystem as a whole;

dynamically adjusting the value of the current power consumption based on the power consumption information received from the memory subsystem and memory components; and

adjusting the stored operational parameters based on the received power consumption information, so that the stored operational parameters more accurately reflect actual operating conditions.

19. The computer program product of claim 16, further comprising code for:

tracking the power consumption of a memory component; and

determining when the memory component is at or above a preset threshold maximum power for that memory component; and

throttling a rate of issuing new operations to that memory component until the memory component is no longer at or above a preset threshold maximum power for the memory component; and

enabling other operations to be issued to other memory components that are not at or above their preset threshold maximum power, whereby utilization of the memory channel bandwidth and data bus bandwidth of the memory components across the memory subsystem are substantially maximized.

20. The computer program product of claim 16, said code for controlling the level of power usage further comprises code for:

calculating an average consumption over a preset period of time; and

initiating said controlling of the level of power consumption on a time average basis, wherein the issuing of operations is not throttled until the power consumption over the preset period of time exceeds a pre-established average power consumption.