Power MOS device

• US 20060180855A1
• Filed: 02/11/2005
• Published: 08/17/2006
• Est. Priority Date: 02/11/2005
• Status: Active Grant

• Current Assignee: Alpha & Omega Semiconductor, Ltd.
• Original Assignee: Alpha & Omega Semiconductor, Ltd.
• Inventors: Bhalla, Anup, Li, Tiesheng, Lui, Sik
• Granted Patent: US 7,285,822 B2
• Time in Patent Office: Days
• US Class Current: 257/330
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/456 on silicon
• CPC Class Codes: H01L 29/47 Schottky barrier electrodes H01L29/435 takes precedence
• CPC Class Codes: H01L 29/66727 with a step of recessing the source electrode
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7806 the other device being a Schottky barrier diode
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A semiconductor device comprises a drain, a body disposed over the drain, having a body top surface, a source embedded in the body, extending downward from the body top surface into the body, a gate trench extending through the source and the body into the drain, a gate disposed in the gate trench, a source body contact trench having a trench wall and an anti-punch through implant that is disposed along the trench wall. A method of fabricating a semiconductor device comprises forming a hard mask on a substrate having a top substrate surface, forming a gate trench in the substrate, through the hard mask, depositing gate material in the gate trench, removing the hard mask to leave a gate structure, forming a source body contact trench having a trench wall and forming an anti-punch through implant.

Claims

1. A semiconductor device comprising:

a drain;

a body disposed over the drain, having a body top surface;

a source embedded in the body, extending downward from the body top surface into the body;

a gate trench extending through the source and the body into the drain;

a gate disposed in the gate trench; and

a source body contact trench having a trench wall and an anti-punch through implant that is disposed along the trench wall.

2. A semiconductor device as recited in claim 1, wherein the source body contact trench is in proximity of the gate trench and adjacent to the source.

3. A semiconductor device as recited in claim 1, wherein the gate has a gate top surface that extends substantially above the body top surface.

4. A semiconductor device as recited in claim 1, wherein the source body contact trench has a trench bottom and the implant is not disposed along the trench bottom.

5. A semiconductor device as recited in claim 1, wherein the source body contact trench has a trench bottom and the implant is disposed continuously along the trench wall and the trench bottom.

6. A semiconductor device as recited in claim 1, wherein the source body contact trench extends through the body to the drain.

7. A semiconductor device as recited in claim 1, further including a contact electrode disposed in the source body contact trench.

8. A semiconductor device as recited in claim 1, further including a contact electrode disposed in the source body contact trench;

wherein the contact electrode includes a metal that is suitable for providing Ohmic contact to the Source and Body regions.

9. A semiconductor device as recited in claim 1, further including a contact electrode disposed in the source body contact trench;

wherein the contact electrode includes a metal that is suitable for providing Ohmic contact to the Source and Body regions; and

the contact electrode includes a metal that is suitable for forming a Schottky diode to the drain region.

10. A semiconductor device as recited in claim 1, further comprising a contact electrode disposed in the source body contact trench;

wherein the contact electrode and the drain form a Schottky diode.

11. A semiconductor device as recited in claim 1, further comprising a contact electrode disposed in the source body contact trench;

wherein the contact electrode and the drain form a Schottky diode situated below a body diode of the device.

12. A semiconductor device as recited in claim 1, wherein the source body contact trench is formed to have a smooth shape.

13. A semiconductor device as recited in claim 1, wherein the anti-punch through implant includes a region heavily doped with P type material.

14. A semiconductor device as recited in claim 1, wherein the source is no more than 0.5 μ

m deep.

15. A semiconductor device as recited in claim 1, wherein the source body contact trench includes a plug.

16-25. -25. (canceled)