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METHOD AND APPARATUS FOR LOCATING AND TESTING A CHIP

  • US 20060181291A1
  • Filed: 02/14/2005
  • Published: 08/17/2006
  • Est. Priority Date: 02/14/2005
  • Status: Active Grant
First Claim
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1. A nest element operable to precisely locate a chip having a plurality of interconnects exposed at a face of the chip to permit conductive connection to the chip through said interconnects, comprising:

  • a pocket dimensioned to locate the chip within a tolerance of less than a width of one of said interconnects;

    a plurality of tapered walls extending upwardly and outwardly from said pocket, said tapered walls adapted to receive a chip placed within said nest element and to guide the chip into said pocket under at least one of a force of gravity and an externally applied force; and

    one or more vibration inducing devices activatable separately from a process used to place the chip within the nest element to impart a vibratory motion to the nest element to cause the placed chip to be guided along said tapered walls into said pocket.

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