Optical image receiving device having wide dynamic range

• US 20060181626A1
• Filed: 02/07/2004
• Published: 08/17/2006
• Est. Priority Date: 02/07/2003
• Status: Active Grant

• Current Assignee: SK Hynix Inc.
• Original Assignee: Siliconfile Technologies Incorporated (SK Hynix Inc.)
• Inventors: Lee, Do Young
• Granted Patent: US 7,733,400 B2
• Time in Patent Office: Days
• US Class Current: 348/308
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H04N 25/00 Circuitry of solid-state image sensors [SSIS]; Control thereof
• CPC Class Codes: H04N 25/59 by controlling the amount of charge storable in the pixel, e.g. modification of the charge conversion ratio of the floating node capacitance
• CPC Class Codes: H04N 25/77 Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
• CPC Class Codes: H04N 3/155 Control of the image-sensor operation, e.g. image processing within the image-sensor

Abstract

Provided is an optical image receiving device having a high and rapid sensitivity and a wide dynamic range manufacture in a CMOS process. The image receiving device includes a capacitor transistor for a special purpose in addition to a general structure of three transistors and a light receiving portion. The capacitor transistor has first and second source/drain ports connected to the capacitance node and the floating diffusion node, respectively, and is gated in response to activation of a predetermined capacitor control signal. In the CMOS optical image receiving device, the floating diffusion node is pumped over an external power voltage. Thus, the electronic potential of the floating diffusion node in the initialization state is much higher than the maximum voltage of the light receiving portion. Thus, the CMOS active pixel has a very high sensitivity in a region where the intensity of light is weak. Furthermore, since the sensitivity decreases in a region where the intensity of light is strong, the dynamic range thereof can be increased very large.

Claims

1. A CMOS active pixel comprising:

a photodiode which generates signal charges according to received photons;

a capacitance node which receives the signal charges generated from the photodiode;

a reset transistor which resets the capacitance node in response to activation of a predetermined reset control signal;

a floating diffusion node which gates a predetermine driving transistor;

the driving transistor which is controlled by a voltage level of the floating diffusion node;

a select transistor which transmits a voltage transmitted by the driving transistor to a corresponding data line in response to a predetermined row selection signal; and

a capacitor transistor which has first and second source/drain ports connected to the capacitance node and the floating diffusion node, respectively, and is gated in response to activation of a predetermined capacitor control signal.

2. The CMOS active pixel of claim 1, wherein the capacitor control signal is inactivated before the reset control signal is inactivated and activated after the inactivation of the reset control signal.

3. The CMOS active pixel of claim 1, wherein the photodiode has a P-I-N (P-type semiconductor-intrinsic semiconductor-N-type semiconductor) structure.

6. The CMOS active pixel of claim 2, wherein the photodiode has a P-I-N (P-type semiconductor-intrinsic semiconductor-N-type semiconductor) structure.

4. A CMOS active pixel comprising:

a photodiode which generates signal charges according to received photons;

a capacitance node which receives the signal charges generated from the photodiode;

a reset transistor which resets the capacitance node in response to activation of a predetermined reset control signal;

a floating diffusion node which gates a predetermine driving transistor;

the driving transistor which is controlled by a voltage level of the floating diffusion node;

a select transistor which transmits a voltage transmitted by the driving transistor to a corresponding data line in response to a predetermined row selection signal; and

a capacitor which has one port commonly connected to the capacitance node and the floating diffusion node and the other port electrically connected to a predetermined capacitor control signal.

5. A CMOS active pixel comprising:

a photodiode which generates signal charges according to received photons;

a transmission transistor which provides the signal charges to a predetermined capacitance node in response to activation of a predetermined transmission control signal;

the capacitance node which receives the signal charges transmitted by the transmission transistor;

a reset transistor which resets the capacitance node in response to activation of a predetermined reset control signal;

a floating diffusion node which gates a predetermine driving transistor and electrically connected to the capacitance node;

the driving transistor which is controlled by a voltage level of the floating diffusion node; and

a select transistor which transmits a voltage transmitted by the driving transistor to a corresponding data line in response to a predetermined row selection signal,

wherein the transmission control signal is inactivated before the reset control signal is inactivated and activated after the inactivation of the reset control signal.