Storage device

• US 20060184758A1
• Filed: 01/11/2006
• Published: 08/17/2006
• Est. Priority Date: 01/11/2005
• Status: Active Grant

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Satori, Kenichi, Konno, Tamaki, Aoki, Yoshitaka, Tsutsui, Keiichi, Nakanishi, Kenichi, Okubo, Hideaki, Bando, Hideaki
• Granted Patent: US 7,325,104 B2
• Time in Patent Office: Days
• US Class Current: 711/168
• CPC Class Codes: G06F 3/0613 in relation to throughput
• CPC Class Codes: G06F 3/0656 Data buffering arrangements
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G11C 7/22 Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management

Abstract

A storage device includes a plurality of memories storing data; and a controller controlling the memories, the controller performing in parallel in a number of the memories, the number being specified by a supplied specifying signal, one of a data writing process for writing data supplied from a connection destination device to which the storage device is connectable and a data reading process for reading data requested by the connection destination device.

Claims

1. A storage device, comprising:

a plurality of memory means for storing data; and

control means for controlling the memory means, the control means performing in parallel in a number of the memory means, the number being specified by a supplied specifying signal, one of a data writing process for writing data supplied from a connection destination device to which the storage device is connectable and a data reading process for reading data requested by the connection destination device.

2. The storage device as claimed in claim 1, further comprising data communication means for performing data communication with the connection destination device based on a PCI Express system.

3. The storage device as claimed in claim 1, wherein the number of the memory means is specified by a specifying signal supplied from the connection destination device.

4. The storage device as claimed in claim 1, further comprising specifying means for allowing a user to specify the number of the memory means,

wherein the specifying means generates the specifying signal indicating the number of the memory means, the number being specified by the user, and supplies the specifying signal to the control means.

5. A storage device, comprising:

a plurality of memory means for storing data; and

control means for controlling the memory means,

wherein one of a speed of data write process for writing data supplied from a connection destination device to which the storage device is connectable and a speed of data read process for reading data requested by the connection destination device is guaranteed.

6. A storage device, comprising:

a plurality of memories storing data; and

a controller controlling the memories, the controller performing in parallel in a number of the memories, the number being specified by a supplied specifying signal, one of a data writing process for writing data supplied from a connection destination device to which the storage device is connectable and a data reading process for reading data requested by the connection destination device.

7. A storage device, comprising:

a plurality of memories storing data; and

a controller controlling the memories,

wherein one of a speed of data write process for writing data supplied from a connection destination device to which the storage device is connectable and a speed of data read process for reading data requested by the connection destination device is guaranteed.