CMOS image sensor for reducing partition noise

• US 20060186504A1
• Filed: 02/10/2006
• Published: 08/24/2006
• Est. Priority Date: 02/24/2005
• Status: Abandoned Application

• Current Assignee: Intellectual Ventures II LLC (Intellectual Ventures LLC)
• Original Assignee: Magnachip Semiconductor Limited (Magnachip Semiconductor)
• Inventors: Bae, Chang-Min, Shim, Kyung-Jin
• Application Number:
  US11/351,438
• Publication Number:
  US 20060186504A1
• Time in Patent Office: Days
• US Class Current: 257/462
• CPC Class Codes: H01L 27/14601 Structural or functional details thereof
• CPC Class Codes: H04N 25/671 for non-uniformity detection or correction

Abstract

A CMOS image sensor according to an embodiment of the present invention includes a unit pixel, including a transfer transistor controlled by a transfer control signal; and a transfer control signal controller for controlling a rising and a falling times of the transfer control signal, wherein the falling time of the transfer control signal is sufficiently increased to reduce a partition noise.

Claims

1. A CMOS image sensor, comprising:

a unit pixel, including a transfer transistor controlled by a transfer control signal; and

a transfer control signal controller for controlling a rising and a falling times of the transfer control signal,

wherein the falling time of the transfer control signal is sufficiently increased to reduce a partition noise.

2. The CMOS image sensor as recited in claim 1, wherein the falling time of the transfer control signal is longer than twice the rising time of the transfer control signal.

3. The CMOS image sensor as recited in claim 1, wherein the unit pixel further includes a photodiode, a reset transistor, a drive transistor and a select transistor.

4. The CMOS image sensor as recited in claim 3, wherein the transfer control signal controller includes a CMOS type driver having a NMOS transistor.

5. The CMOS image sensor as recited in claim 4, wherein a size of the NMOS transistor is reduced in order to increase the falling time when the transfer transistor is turned off.

6. The CMOS image sensor as recited in claim 5, wherein the size of the NMOS transistor includes a W/L ratio, where the W and the L represent a channel width and a channel length, respectively.

7. The CMOS image sensor as recited in claim 6, wherein the channel length is increased to reduce the W/L ratio of the transfer transistor.

8. The CMOS image sensor as recited in claim 7, wherein the CMOS type driver includes a plurality of NMOS transistors connected in series to increase the channel length.

9. The CMOS image sensor as recited in claim 8, wherein at least two sources of the NMOS transistors connected in series are commonly connected to a ground voltage.

10. The CMOS image sensor as recited in claim 9, wherein the sources of the NMOS transistors are commonly connected to the ground voltage through a metal line.

11. The CMOS image sensor as recited in claim 3, further comprising a plurality of capacitive parts connected between a ground voltage and a common node which is connected between an output terminal of the transfer control signal controller and gates of the transfer transistors to thereby increase the falling time of the transfer transistor.

12. The CMOS image sensor as recited in claim 11, wherein each of the capacitive parts includes a capacitor and a switch connected in series.

13. The CMOS image sensor as recited in claim 12, wherein the plurality of switches are operated individually.

14. The CMOS image sensor as recited in claim 12, wherein each of the plural capacitors has a different capacitance.

15. The CMOS image sensor as recited in claim 11, wherein the transfer control signal controller includes a CMOS type driver.

16. A CMOS image sensor, comprising:

a plurality of unit pixels arranged in a column X a row form, each including a transfer transistor controlled by a transfer control signal; and

a transfer control signal controller for controlling a rising and a falling times of the transfer control signal; and

a plurality of capacitive parts connected between a ground voltage and a common node which is connected between an output terminal of the transfer control signal controller and gates of the transfer transistors to thereby increase the falling time of the transfer transistor when the transfer transistors contained in the unit pixels of the same row are turned off,

wherein, the plural unit pixels are disposed in the same row being controlled by the single transfer control signal controller.

17. The CMOS image sensor as recited in claim 16, wherein each of the capacitive parts includes a capacitor and a switch connected in series.

18. The CMOS image sensor as recited in claim 17, wherein the plurality of switches are operated individually.

19. The CMOS image sensor as recited in claim 17, wherein each of the plural capacitors has a different capacitance.

20. The CMOS image sensor as recited in claim 16, wherein the transfer control signal controller includes a CMOS type driver.