Voltage regulation system comprising operating condition detection means

• US 20060192542A1
• Filed: 04/05/2004
• Published: 08/31/2006
• Est. Priority Date: 04/16/2003
• Status: Active Grant

• Current Assignee: NXP B.V. (NXP Semiconductors NV)
• Original Assignee: Koninklijke Philips Electronics N.V. (Koninklijke Philips N.V.)
• Inventors: Uguen, Emeric
• Granted Patent: US 7,443,144 B2
• Time in Patent Office: Days
• US Class Current: 323/312
• CPC Class Codes: G05F 1/565 sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor G05F1/563 takes precedence

Abstract

The invention relates to a system for generating an output voltage (Vout) from an input voltage (Vup), said system comprising:—regulation means (T1) for regulating said output voltage (Vout) to a target voltage level (Vcons), said regulation means (T1) comprising a control terminal intended to receive a regulation signal (SR) and an output terminal for delivering said output voltage (Vout),—first control means (COMP1) for delivering a first control signal (SC1) from a comparison between said regulation signal (SR) and a first reference signal (Vref1).

Claims

1. A system for generating an output voltage from an input voltages, said system comprising:

regulation means for regulating said output voltage to a target voltage level, said regulation means comprising a control terminal intended to receive a regulation signal and an output terminal for delivering said output voltage,

first control means for delivering a first control signal from a comparison between said regulation signal and a first reference signal.

2. A system as claimed in claim 1, comprising second control means for delivering a second control signal from a comparison between a fraction of the current delivered by said regulation means on said output terminal and a second reference signal.

3. A system as claimed in claim 1 comprising means for deactivating the generation of said output voltage from said first control signal and/or said second control signals.

4. An interface circuit comprising a system as claimed in claim 1 for generating said output signal to a smart card.

5. A smart card reader comprising an interface circuit as claimed in claim 4.

6. An integrated circuit comprising a system as claimed in claim 1.