Inductor formed in an integrated circuit

• US 20060192647A1
• Filed: 05/01/2006
• Published: 08/31/2006
• Est. Priority Date: 09/30/2003
• Status: Active Grant

• Current Assignee: Bell Semiconductor, LLC (Hilco Inc. (d/b/a Hilco Global))
• Original Assignee: Edward Belden Harris, Kurt George Steiner, Sailesh M. Merchant, Susan Clay Vitkavage
• Inventors: Harris, Edward Belden, Vitkavage, Susan Clay, Steiner, Kurt George, Merchant, Sailesh Mansinh
• Granted Patent: US 7,541,238 B2
• Time in Patent Office: Days
• US Class Current: 336/200
• CPC Class Codes: H01F 41/041 Printed circuit coils apparatus or processes for manufacturing printed circuits in general H05K3/00
• CPC Class Codes: H01L 2224/05001 Internal layers
• CPC Class Codes: H01L 2224/05027 the internal layer extending out of an opening
• CPC Class Codes: H01L 2224/0508 being stacked
• CPC Class Codes: H01L 2224/05124 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05166 Titanium [Ti] as principal constituent
• CPC Class Codes: H01L 2224/05181 Tantalum [Ta] as principal constituent
• CPC Class Codes: H01L 2224/05184 Tungsten [W] as principal constituent
• CPC Class Codes: H01L 2224/05572 the external layer extending out of an opening
• CPC Class Codes: H01L 2224/056 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2224/13 of an individual bump connector
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/48 of an individual wire connector
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 24/03 Manufacturing methods
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 24/10 Bump connectors bumps on insulating substrates, e.g. chip carriers, H01L23/49816; Manufacturing methods related thereto
• CPC Class Codes: H01L 24/13 of an individual bump connector
• CPC Class Codes: H01L 27/08 including only semiconductor components of a single kind
• CPC Class Codes: H01L 28/10 : Inductors
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/01027 : Cobalt [Co]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01068 : Erbium [Er]
• CPC Class Codes: H01L 2924/01073 : Tantalum [Ta]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01075 : Rhenium [Re]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/04941 : TiN
• CPC Class Codes: H01L 2924/04953 : TaN
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H01L 2924/30105 : Capacitance
• CPC Class Codes: H01L 2924/30107 : Inductance
• CPC Class Codes: Y10T 29/4902 : Electromagnet, transformer or inductor

Abstract

An inductor formed within an integrated circuit and a method for forming the inductor. The inductor comprises an underlying layer of aluminum formed in a first metallization layer and patterned and etched into the desired shape. In one embodiment the aluminum line comprises a spiral shape. According to a damascene process, a conductive runner, preferably of copper, is formed in a dielectric layer overlying the aluminum line and in electrical contact therewith. The aluminum line and the conductive runner cooperate to form the inductor. In another embodiment the aluminum line and the conductive runner are formed in a vertically spaced-apart orientation, with tungsten plugs or conductive vias formed to provide electrical connection therebetween. A method for forming the inductor comprises forming an aluminum conductive line and forming a conductive runner over the conductive line.

Claims

1. A method for forming an inductor in a semiconductor integrated circuit, the method comprising:

forming a conductive line in a metallization layer;

forming a dielectric layer overlying the conductive line;

forming a trench in the dielectric layer; and

forming a conductive runner in the trench, wherein the conductive runner is in conductive communication with the conductive line, and wherein the conductive line and the conductive runner cooperate to produce an inductive effect.

2. The method of claim 1 wherein the step of forming the conductive line further comprises:

forming a conductive layer; and

removing regions of the conductive layer to form the conductive line.

3. The method of claim 2 wherein the step of forming the conductive layer further comprise forming an aluminum conductive layer.

4. The method of claim 1 wherein the step of forming the conductive runner in the trench further comprises depositing copper in the trench.

5. The method of claim 4 wherein the step of depositing copper in the trench further comprises electroplating copper in the trench.

6. The method of claim 1 wherein the step of forming the trench in the dielectric layer further comprises forming the trench in vertical alignment with the conductive line.

7. The method of claim 1 further comprising:

forming an opening extending to the conductive line in the dielectric layer; and

forming a conductive structure in the opening, wherein the conductive structure forms an inductor terminal.

8. The method of claim 7 wherein the step of forming the conductive structure further comprises forming a solder bump.

9. The method of claim 7 wherein the step of forming the conductive structure further comprises forming a bond pad.

10. A method for forming an inductor in a semiconductor integrated circuit, the method comprising:

forming a conductive line in a metallization layer;

forming a first dielectric layer overlying the conductive line;

forming conductive structures in the first dielectric layer;

forming a conductive pad overlying and in electrical communication with one of the conductive structures and a terminal end of the conductive line;

forming a second dielectric layer overlying the first dielectric layer and the conductive pad;

forming a trench in the second dielectric layer; and

forming a conductive runner in the trench, wherein the conductive runner is in conductive communication with the conductive line through the conductive structures, and wherein the conductive line and the conductive runner cooperate to produce an inductive effect.

11. The method of claim 10 wherein the step of forming the conductive line further comprises:

forming a conductive layer; and

removing regions of the conductive layer to form the conductive line.

12. The method of claim 11 wherein the step of forming the conductive layer further comprise forming an aluminum conductive layer.

13. The method of claim 10 wherein the step of forming the conductive runner in the trench further comprises depositing copper in the trench.

14. The method of claim 13 wherein the step of depositing copper in the trench further comprises electroplating copper in the trench.

15. The method of claim 10 wherein the step of forming the trench in the dielectric layer further comprises forming the trench in vertical alignment with the conductive line.

16. The method of claim 10 further comprising:

forming an opening in the second dielectric layer extending to the conductive pad;

forming a conductive structure in the opening, wherein the conductive structure forms an inductor terminal.

17. The method of claim 16 wherein the step of forming the conductive structure further comprises forming a solder bump.

18. The method of claim 16 wherein the step of forming the conductive structure further comprises forming a bond pad.

19. An integrated circuit comprising an inductor formed therein, the integrated circuit comprising:

a substrate;

a plurality of material layers overlying the substrate;

a conductive line disposed in a first metallization layer;

conductive structures disposed in a first dielectric layer overlying the first metallization layer; and

a conductive runner disposed in a second metallization layer overlying the first dielectric layer, wherein the conductive runner is in substantially vertical alignment with the conductive line, wherein the conductive line and the conductive runner conductively connected by the conductive structures cooperate to produce an inductive effect.

20. The integrated circuit of claim 19 wherein a material of the conductive line comprises aluminum.

21. The integrated circuit of claim 19 wherein a material of the conductive runner comprises copper.

22. The integrated circuit of claim 19 wherein the first metallization layer comprises an (n-1)^th metallization layer and the second metallization layer comprises an nth metallization layer of the integrated circuit.

23. The integrated circuit of claim 19 further comprising a second dielectric layer wherein the conductive runner is formed in the second dielectric layer, and further comprising a conductive pad formed in the second metallization layer and in conductive communication with one of the conductive structures conductively connected to a terminal end region of the conductive line, and wherein the second dielectric layer defines an opening therein, the opening extending to the conductive pad, the integrated circuit further comprising an inductor terminal within the opening and in electrical contact with the conductive pad.

24. The integrated circuit of claim 23 wherein the inductor terminal comprises a solder bump.

25. The integrated circuit of claim 23 wherein the inductor terminal comprises a bond pad.

26. The integrated circuit of claim 19 wherein the inductor has an inductance responsive to a shape, a length and a width of the conductive line and the conductive runner.

27. The integrated circuit of claim 19 wherein the substrate has an upper surface, and wherein the conductive line and the conductive runner have a spiral shape in a plane parallel to the upper surface.

28. The integrated circuit of claim 19 wherein a material of the conductive runner has a higher conductivity than a material of the conductive line.

29. The integrated circuit of claim 19 wherein the conductive structures comprise conductive plugs, and wherein a material of the conductive plugs is selected from between copper and tungsten.