Imager row-wise noise correction

• US 20060192864A1
• Filed: 02/28/2005
• Published: 08/31/2006
• Est. Priority Date: 02/28/2005
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Mauritzson, Rick
• Granted Patent: US 7,701,493 B2
• Time in Patent Office: Days
• US Class Current: 348/241
• CPC Class Codes: H01L 27/14603 Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14623 Optical shielding
• CPC Class Codes: H04N 25/63 applied to dark current
• CPC Class Codes: H04N 25/68 applied to defects
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array

Abstract

An imager having optically and electrically black reference pixels in each row of the imager'"'"'s pixel array. Since the reference pixels of each row experience the same row-wise noise as active imaging pixels in the associated row, the signals from the reference pixels are used to cancel out row-wise noise from the row of imaging pixels. The reference pixels are designed such that their photosensors are physically or effectively removed from the row-wise noise correction, thus rendering them electrically black or dark. As such, the reference pixels can be used to provide row-wise noise correction without the adverse effects of warm and hot pixels.

Claims

1. An imaging device comprising:

an array of imaging pixels, said array being organized into a plurality of rows and columns; and

a plurality of reference pixels, said plurality of reference pixels being arranged into a plurality of rows, each row of reference pixels corresponding to a respective row of imaging pixels within said array, each reference pixel including a circuit for causing said reference pixel to output electrically black signals to be used in row-wise noise correction of signals from the imaging pixels from its associated row.

2. The device of claim 1, wherein each reference pixel comprises a photosensor connected to a predetermined voltage.

3. The device of claim 2, wherein the predetermined voltage is a supply voltage for said array.

4. The device of claim 2, wherein the photosensor is a pinned photodiode and the predetermined voltage has a potential greater than a pinning voltage of the pinned photodiode.

5. The device of claim 2, wherein the photosensor is a pinned photodiode and the predetermined voltage is a supply voltage for said array.

6. The device of claim 2, wherein the photosensor is a photodiode and the predetermined voltage has a potential greater than a reset potential of the photodiode.

7. The device of claim 1, wherein each reference pixel comprises a source follower transistor having a gate and a source/drain terminal connected to a predetermined voltage.

8. The device of claim 7, wherein each reference pixel does not include a photosensitive element.

9. The device of claim 1, wherein each reference pixel comprises:

a photosensor; and

a floating diffusion region for storing charges from the photosensor, said reference pixel being operable to output electrically black signals by resetting the photosensor and floating diffusion region prior to readout.

10. The device of claim 9, wherein each reference pixel further comprises:

a transfer transistor connected between the photosensor and the floating diffusion region; and

a reset transistor connected between a pixel supply voltage and the floating diffusion region, said photosensor and floating diffusion region being continuously reset by activating said reset and transfer transistors at a same time and maintaining said reset and transfer transistors in an activated state.

11. The device of claim 9, wherein each reference pixel further comprises:

a transfer transistor connected between the photosensor and the floating diffusion region; and

a reset transistor connected between the pixel supply voltage Vaa-pix and the floating diffusion region, said photosensor and floating diffusion region being reset by activating said reset and transfer transistors prior to readout.

12. The device of claim 1, wherein each reference pixel comprises:

a photosensor; and

a reset transistor, said reference pixel being operable to output electrically black signals by activating the reset transistor to reset the photosensor prior to readout.

13. The device of claim 1, wherein said imaging pixels and reference pixels are CMOS pixels.

14. The device of claim 1, wherein said imaging pixels and reference pixels are CCD pixels.

15. The device of claim 1, wherein each reference pixel comprises a photosensor that does not have an accumulation region.

16. A processor system comprising:

a processor; and

an imaging device coupled to said processor, said device comprising;

an array of imaging pixels, said array being organized into a plurality of rows and columns, and

a plurality of reference pixels, said plurality of reference pixels being arranged into a plurality of rows, each row of reference pixels corresponding to a respective row of imaging pixels within said array, each reference pixel including a circuit for causing said reference pixel to output electrically black signals to be used in row-wise noise correction of signals from the imaging pixels from its associated row.

17. The system of claim 16, wherein each reference pixel comprises a photosensor connected to a predetermined voltage.

18. The system of claim 17, wherein the predetermined voltage is a supply voltage for said array.

19. The system of claim 17, wherein the photosensor is a pinned photodiode and the predetermined voltage has a potential greater than a pinning voltage of the pinned photodiode.

20. The system of claim 17, wherein the photosensor is a pinned photodiode and the predetermined voltage is a supply voltage for said array.

21. The system of claim 17, wherein the photosensor is a photodiode and the predetermined voltage has a potential greater than a reset potential of the photodiode.

22. The system of claim 16, wherein each reference pixel comprises a source follower transistor having a gate and a source/drain terminal connected to a predetermined voltage.

23. The system of claim 22, wherein each reference pixel does not include a photosensitive element.

24. The system of claim 16, wherein each reference pixel comprises:

a photosensor; and

a floating diffusion region for storing charges from the photosensor, said reference pixel being operable to output electrically black signals by resetting the photosensor and floating diffusion region prior to reset.

25. The system of claim 24, wherein each reference pixel further comprises:

a transfer transistor connected between a pixel supply voltage and the floating diffusion region; and

a reset transistor connected between the transfer transistor and the floating diffusion region, said photosensor and floating diffusion region being continuously reset by activating said reset and transfer transistors at a same time and maintaining said reset and transfer transistors in an activated state.

26. The system of claim 24, wherein each reference pixel further comprises:

a transfer transistor connected between the photosensor and the floating diffusion region; and

a reset transistor connected between the pixel supply voltage Vaa-pix and the floating diffusion region, said photosensor and floating diffusion region being reset by activating said reset and transfer transistors prior to readout.

27. The system of claim 16, wherein each reference pixel comprises:

a photosensor; and

a reset transistor, said reference pixel being operable to output electrically black signals by activating the reset transistor to reset the photosensor prior to readout.

28. The system of claim 16, wherein said imaging device is a CMOS imager.

29. The system of claim 16, wherein said imaging pixels and reference pixels are CMOS pixels.

30. The system of claim 16, wherein said imaging device is a CCD imager.

31. The system of claim 16, wherein each reference pixel comprises a photosensor that does not have an accumulation region.

32. A method of operating an imaging device to provide row-wise noise correction, said method comprising the acts of:

generating electrically black signals from a plurality of reference pixels in a row;

inputting signals from a plurality of active pixels in the row; and

using the electrically black signals from the reference pixels to substantially eliminate a row-wise noise component from the signals from the active pixels.

33. The method of claim 32, wherein the electrically black signals are generated by connecting a photosensor within the reference pixels to a predetermined voltage.

34. The method of claim 33, wherein the predetermined voltage is a supply voltage for said active pixels.

35. The method of claim 33, wherein the photosensor is a pinned photodiode and the connecting act comprises connecting the pinned photodiode to a potential greater than a pinning voltage of the pinned photodiode.

36. The method of claim 33, wherein the photosensor is a pinned photodiode and the connecting act comprises connecting the pinned photodiode to a supply voltage for the active pixels.

37. The method of claim 33, wherein the photosensor is a photodiode and the connecting act comprises connecting the photodiode to a potential greater than a reset potential of the photodiode.

38. The method of claim 32, wherein each reference pixel comprises a source follower transistor and the generating step comprises applying a predetermined voltage to a gate and a source/drain terminal of the source follower transistor.

39. The method of claim 32, wherein each reference pixel comprises a photosensor and a floating diffusion region for storing charges from the photosensor, and said generating act comprises resetting the photosensor and floating diffusion region prior to readout.

40. The method of claim 39, wherein each reference pixel further comprises a transfer transistor connected between the photosensor and the floating diffusion region and a reset transistor connected between the transfer transistor and the floating diffusion region, said continuously resetting act comprising the acts of:

activating the reset and transfer transistors at a same time; and

maintaining the reset and transfer transistors in an activated state.

41. The method of claim 39, wherein each reference pixel further comprises a transfer transistor connected between the photosensor and the floating diffusion region and a reset transistor connected between the transfer transistor and the floating diffusion region, said resetting act comprising the act of activating the reset and transfer transistors prior to readout.

42. The method of claim 32, wherein each reference pixel comprises a photosensor, a reset transistor, and said generating act comprises activating the reset transistor to reset the photosensor.

43. A method of manufacturing an imaging device comprising the acts of:

fabricating an array of imaging pixels, said array being organized into a plurality of rows and columns; and

fabricating a plurality of reference pixels, said plurality of reference pixels being arranged into a plurality of rows, each row of reference pixels corresponding to a respective row of imaging pixels within said array, each reference pixel being configured to output electrically black signals to be used in row-wise noise correction of signals from the imaging pixels from its associated row.

44. The method of claim 43, wherein each reference pixel comprises a photosensor and said method further comprises connecting a predetermined voltage source terminal to the photosensor of each reference pixel.

45. The method of claim 44, wherein the predetermined voltage terminal is a supply voltage terminal for said array.

46. The method of claim 44, wherein the photosensor is a pinned photodiode and the predetermined voltage terminal is a supply voltage terminal for said array.

47. The method of claim 43, wherein each reference pixel comprises a source follower transistor and said method further comprises the act of connecting a predetermined voltage terminal to a gate and a source/drain terminal of the source follower transistor.