Metallization target optimization method providing enhanced metallization layer uniformity

• US 20060196765A1
• Filed: 03/07/2005
• Published: 09/07/2006
• Est. Priority Date: 03/07/2005
• Status: Abandoned Application

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Lin, Steven, Cheng, Hsi-Kuei, Chuang, Ray, NI, Chyi-Tsong, Cheng, Min-Yuan, Feng, Hsien-Ping, Tsao, Jung-Chin, Wang, Chieh-Tsao
• Application Number:
  US11/074,524
• Publication Number:
  US 20060196765A1
• Time in Patent Office: Days
• US Class Current: 204/192.1
• CPC Class Codes: C23C 14/0641 Nitrides C23C14/0617 takes precedence
• CPC Class Codes: C23C 14/0682 Silicides
• CPC Class Codes: C23C 14/165 by cathodic sputtering
• CPC Class Codes: C23C 14/3421 using heated targets
• CPC Class Codes: C23C 14/54 Controlling or regulating the coating process
• CPC Class Codes: H01J 37/32568 Relative arrangement or disposition of electrodes; moving means
• CPC Class Codes: H05K 3/16 by cathodic sputtering

Abstract

A method for forming a microelectronic layer while employing a sputtering method employs a reactor chamber. A sputtering target and a substrate are positioned within the reactor chamber, along with a sputtering target heater at a side of sputtering target opposite the substrate. At least one of: (1) a heater to sputtering target distance; (2) sputtering power; (3) deposition time; and (4) sputtering gas flow rate, is controlled in accord with a pre-determined function of sputtering target lifetime to provide enhanced uniformity of the deposited layer.

Claims

1. A method for forming a microelectronic layer comprising:

providing a reactor chamber;

positioning a substrate with respect to a front side of a sputtering target within the reactor chamber;

positioning a sputtering target heater with respect to a backside of the sputtering target; and

adjusting a separation distance of the sputtering target with respect to the heater such that a uniformity of a microelectronic layer sputtered from the sputtering target to the substrate is optimized.

2. The method of claim 1 wherein the separation distance of the sputtering target with respect to the heater is adjusted within the context of a pre-determined correlation of the variable over the lifetime of the sputtering target, such as to optimize uniformity of the microelectronic layer.

3. The method of claim 1 wherein the microelectronic layer is selected from the group consisting of conductor layers, semiconductor layers and dielectric layers.

4. The method of claim 1 wherein the reactor chamber is held at a pressure of from about 1 to about 100 mtorr.

5. The method of claim 1 wherein the substrate is selected from the group consisting of integrated circuit substrates, ceramic substrates and optoelectronic substrates.

6. The method of claim 1 wherein the sputtering target comprises a metal selected from the group consisting of tungsten, titanium, nickel and cobalt.

7. The method of claim 1 wherein the sputtering target comprises cobalt.

8. The method of claim 1 wherein the heater to target spacing is determined according to the equation:

Best Spacing Position=A[1−

(1.55E−

3*use time)]

9. A method for forming a microelectronic layer comprising:

providing a reactor chamber;

positioning a substrate with respect to a sputtering target within the reactor chamber; and

sputtering the sputtering target to form a microelectronic layer upon the substrate while adjusting a sputtering power with respect to an expected lifetime of the sputtering target, where the adjustment is made within the context of a pre-determined correlation of the variable over the lifetime of the sputtering target, such as to optimize uniformity of the microelectronic layer.

10. The method of claim 9 wherein the reactor chamber is held at a vacuum of from about 0.01 to about 0.001 torr.

11. The method of claim 9 wherein the substrate is selected from the group consisting of integrated circuit substrates, ceramic substrates and optoelectronic substrates.

12. The method of claim 9 wherein the sputtering target comprises a metal selected from the group consisting of copper, gold, tungsten, titanium and nickel.

13. A method for forming a microelectronic layer comprising:

providing a reactor chamber;

positioning a substrate with respect to a sputtering target within the reactor chamber; and

sputtering the sputtering target to form a conductor layer upon the substrate while adjusting a deposition time with respect to an expected lifetime of the sputtering target, where the adjustment is made within the context of a pre-determined correlation of the variable over the lifetime of the sputtering target, such as to optimize uniformity of the microelectronic layer.

14. The method of claim 13 wherein the reactor chamber is held at a vacuum of from about 0.01 to about 0.001 torr.

15. The method of claim 13 wherein the substrate is selected from the group consisting of integrated circuit substrates, ceramic substrates and optoelectronic substrates.

16. The method of claim 13 wherein the sputtering target comprises a metal selected from the group consisting of copper, gold, tungsten, titanium and nickel.

17. A method for forming a microelectronic layer comprising:

providing a reactor chamber;

positioning a substrate with respect to a sputtering target within the reactor chamber; and

sputtering the sputtering target to form a conductor layer upon the substrate while adjusting a sputtering gas flow with respect to an expected lifetime of the sputtering target, where the adjustment is made within the context of a pre-determined correlation of the variable over the lifetime of the sputtering target, such as to optimize uniformity of the microelectronic layer.

18. The method of claim 17 wherein the reactor chamber is held at a vacuum of from about 0.01 to about 0.001 torr.

19. The method of claim 17 wherein the substrate is selected from the group consisting of integrated circuit substrates, ceramic substrates and optoelectronic substrates.

20. The method of claim 17 wherein the sputtering target comprises a metal selected from the group consisting of copper, gold, tungsten, titanium and nickel.