Vehicle-mounted electronic control apparatus
First Claim
1. A vehicle-mounted electronic control apparatus comprising:
- a main power supply circuit that is connected to an on-board battery through a power switch in such a manner that it is fed with electric power from said on-board battery to generate a first stabilized control voltage when said power switch is closed;
an auxiliary power supply circuit that is directly fed with electric power from said on-board battery to generate a second stabilized control voltage;
a control CPU composed of a microprocessor including a nonvolatile control memory in which a control program and a reference control constant are written; and
a volatile backup memory that is always fed with electric power through said main power supply circuit or said auxiliary power supply circuit so as to store learning correction data for said reference control constant stored in said nonvolatile control memory;
wherein said control CPU is connected to a variety of kinds of input sensors and a variety of kinds of electric loads, and is fed with electric power through said main power supply circuit so as to control said electric loads in response to the contents of said nonvolatile control memory and the operating state of said input sensors;
said apparatus further comprising;
a power supply turn-on detection section that detects the turn-on state of said auxiliary power supply circuit;
a power supply interruption monitoring memory that responds to a detection operation of said power supply turn-on detection section;
an initialization section that initializes said backup memory;
an initialization completion storage section that stores an initialization completion state of said initialization section;
a hierarchization abnormality detection section that detects an abnormality in hierarchization of said backup memory; and
an abnormality detection selection section that selects the execution of abnormality detection by said hierarchization abnormality detection section;
wherein said power supply turn-on detection section stores the existence of a power supply interrupted state into said power supply interruption monitoring memory by putting the contents of said power supply interruption monitoring memory into a reset state in response to when said auxiliary power supply circuit is connected to said on-board battery;
said initialization section initializes the contents of said backup memory by means of said control CPU in response to when electric power is fed from said main power supply circuit to said control CPU and when the contents of said power supply interruption monitoring memory has not stored a set state;
said initialization completion storage section rewrites and changes the contents of said power supply interruption monitoring memory into a set state in response to when said control CPU has completed the initialization of said backup memory, and said initialization completion storage section includes an initialization storage verification section or a voltage monitoring section;
said initialization storage verification section verifies whether the rewriting and changing of said power supply interruption monitoring memory has been executed;
said voltage monitoring section monitors whether feeding power to said power supply interruption monitoring memory is executed;
said hierarchization abnormality detection section comprises a plurality of abnormality detection sections that are executed by said control CPU, and said hierarchization abnormality detection section determines whether there is an abnormality in the memory contents of said backup memory, and initializes said backup memory when an abnormality has been detected in the memory contents of said backup memory;
immediately after said power switch is turned on, even when no abnormality is detected in the execution result of a part of the abnormality detection sections in said hierarchization abnormality detection section, said abnormality detection selection section omits execution of the other abnormality detection sections in said hierarchization abnormality detection section; and
during operation of said control CPU, said abnormality detection selection section repeatedly executes at least one of the other abnormality detection sections in said hierarchization abnormality detection section in a sequential manner.
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Accused Products
Abstract
A vehicle-mounted electronic control apparatus can perform a variety of abnormality detections while reducing the control load of a microprocessor in the abnormality detection of a volatile backup memory that is backed up by an on-board battery. The apparatus includes a control CPU which is fed with power from a main power supply circuit upon closure of a power switch, a nonvolatile control memory and a backup memory. Even if the power switch is opened, the backup memory, being a partial area of a RAM memory, is fed with power through an auxiliary power supply circuit connected directly to the battery. When the battery is replaced with a new one and connected again, a power supply interruption monitoring memory is reset. At the start of operation of the control CPU, the backup memory is initialized based on reset information, and the power supply interruption monitoring memory is rewritten into a set state.
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Citations
16 Claims
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1. A vehicle-mounted electronic control apparatus comprising:
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a main power supply circuit that is connected to an on-board battery through a power switch in such a manner that it is fed with electric power from said on-board battery to generate a first stabilized control voltage when said power switch is closed;
an auxiliary power supply circuit that is directly fed with electric power from said on-board battery to generate a second stabilized control voltage;
a control CPU composed of a microprocessor including a nonvolatile control memory in which a control program and a reference control constant are written; and
a volatile backup memory that is always fed with electric power through said main power supply circuit or said auxiliary power supply circuit so as to store learning correction data for said reference control constant stored in said nonvolatile control memory;
wherein said control CPU is connected to a variety of kinds of input sensors and a variety of kinds of electric loads, and is fed with electric power through said main power supply circuit so as to control said electric loads in response to the contents of said nonvolatile control memory and the operating state of said input sensors;
said apparatus further comprising;
a power supply turn-on detection section that detects the turn-on state of said auxiliary power supply circuit;
a power supply interruption monitoring memory that responds to a detection operation of said power supply turn-on detection section;
an initialization section that initializes said backup memory;
an initialization completion storage section that stores an initialization completion state of said initialization section;
a hierarchization abnormality detection section that detects an abnormality in hierarchization of said backup memory; and
an abnormality detection selection section that selects the execution of abnormality detection by said hierarchization abnormality detection section;
wherein said power supply turn-on detection section stores the existence of a power supply interrupted state into said power supply interruption monitoring memory by putting the contents of said power supply interruption monitoring memory into a reset state in response to when said auxiliary power supply circuit is connected to said on-board battery;
said initialization section initializes the contents of said backup memory by means of said control CPU in response to when electric power is fed from said main power supply circuit to said control CPU and when the contents of said power supply interruption monitoring memory has not stored a set state;
said initialization completion storage section rewrites and changes the contents of said power supply interruption monitoring memory into a set state in response to when said control CPU has completed the initialization of said backup memory, and said initialization completion storage section includes an initialization storage verification section or a voltage monitoring section;
said initialization storage verification section verifies whether the rewriting and changing of said power supply interruption monitoring memory has been executed;
said voltage monitoring section monitors whether feeding power to said power supply interruption monitoring memory is executed;
said hierarchization abnormality detection section comprises a plurality of abnormality detection sections that are executed by said control CPU, and said hierarchization abnormality detection section determines whether there is an abnormality in the memory contents of said backup memory, and initializes said backup memory when an abnormality has been detected in the memory contents of said backup memory;
immediately after said power switch is turned on, even when no abnormality is detected in the execution result of a part of the abnormality detection sections in said hierarchization abnormality detection section, said abnormality detection selection section omits execution of the other abnormality detection sections in said hierarchization abnormality detection section; and
during operation of said control CPU, said abnormality detection selection section repeatedly executes at least one of the other abnormality detection sections in said hierarchization abnormality detection section in a sequential manner. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A vehicle-mounted electronic control apparatus comprising:
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a main power supply circuit that is connected to an on-board battery through a power switch in such a manner that it is fed with electric power from said on-board battery to generate a first stabilized control voltage when said power switch is closed;
an auxiliary power supply circuit that is directly fed with electric power from said on-board battery to generate a second stabilized control voltage;
a control CPU composed of a microprocessor including a nonvolatile control memory in which a control program and a reference control constant are written; and
a volatile backup memory that is always fed with electric power through said main power supply circuit or said auxiliary power supply circuit so as to store learning correction data for said reference control constant stored in said nonvolatile control memory;
wherein said control CPU is connected to a variety of kinds of input sensors and a variety of kinds of electric loads, and is fed with electric power through said main power supply circuit so as to control said electric loads in response to the contents of said nonvolatile control memory and the operating state of said input sensors;
said apparatus further comprising;
an engine state detection section that detects an operating/stopped state of an engine to be controlled;
an awake timer circuit part composed of an awake CPU comprising a microprocessor including a nonvolatile awake memory and a RAM memory for arithmetic calculation;
an initialization reset section for said RAM memory;
an initialization section for said backup memory;
an initialization completion storage section that stores an initialization completion state of said initialization section;
a hierarchization abnormality detection section that detects an abnormality in hierarchization of said backup memory; and
an abnormality detection selection section that selects the execution of abnormality detection by said hierarchization abnormality detection section;
wherein said awake timer circuit part is always fed with electric power from said on-board battery through a stabilization power supply circuit generating a predetermined stabilized voltage, and measures the time during which said main power supply circuit has been interrupted, and when said time thus measured reaches a predetermined target awake time, said awake timer circuit part awakes and activates said control CPU in a stopped state of said engine by generating an awake output signal thereby to connect said main power supply circuit to said on-board battery;
said awake CPU is activated in response to when an output voltage of said stabilization power supply circuit becomes equal to or more than a predetermined value;
said initialization reset section resets the contents of said RAM memory at the time when the awake CPU is activated;
said initialization completion storage section writes and saves, in response to the completion of initialization of said backup memory by said control CPU, the fact that said awake CPU is in an initialization completion state with respect to a specific address of said RAM memory, based on an initialization completion signal from said control CPU, and said initialization completion storage section includes an initialization storage verification section or a voltage monitoring section;
said initialization storage verification section verifies whether the rewriting and changing of said RAM memory has been executed;
said voltage monitoring section monitors whether feeding power to said RAM memory is executed;
said initialization section initializes said backup memory by means of said control CPU in response to when electric power is fed from said main power supply circuit to said control CPU and when a specific address of said RAM memory has not stored an initialization completion state;
said hierarchization abnormality detection section comprises a plurality of abnormality detection sections that are executed by said control CPU, and said hierarchization abnormality detection section determines whether there is an abnormality in the memory contents of said backup memory, and initializes said backup memory when an abnormality has been detected in the memory contents of said backup memory;
immediately after said power switch is turned on, said abnormality detection selection section executes a part of the abnormality detection sections in said hierarchization abnormality detection section, and even when no abnormality is detected in the execution result, said abnormality detection selection section omits execution of the other abnormality detection sections in said hierarchization abnormality detection section; and
during operation of said control CPU, said abnormality detection selection section repeatedly executes at least one of the other abnormality detection sections in said hierarchization abnormality detection section in a sequential manner. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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Specification