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Method for improved ESD performance within power over ethernet devices

  • US 20060215343A1
  • Filed: 10/26/2005
  • Published: 09/28/2006
  • Est. Priority Date: 03/28/2005
  • Status: Abandoned Application
First Claim
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1. An integrated circuit (IC) comprising:

  • an Ethernet physical layer (PHY) module having a plurality of inputs;

    a power feed circuit electrically coupled to the plurality of inputs; and

    wherein the power feed circuit allows a ground of the Ethernet PHY module to float relative to earth ground.

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