TCAM BIST with redundancy

• US 20060215432A1
• Filed: 03/28/2005
• Published: 09/28/2006
• Est. Priority Date: 03/28/2005
• Status: Active Grant

• Current Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Original Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Inventors: Wickeraad, John A., Greenlaw, Jonathan E.
• Granted Patent: US 7,624,313 B2
• Time in Patent Office: Days
• US Class Current: 365/49.150
• CPC Class Codes: G11C 15/00 Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
• CPC Class Codes: G11C 29/44 Indication or identification of errors, e.g. for repair
• CPC Class Codes: G11C 29/76 using address translation or modifications
• CPC Class Codes: G11C 29/816 for an application-specific layout

Abstract

In an embodiment of the invention, a method of providing redundancy in a ternary content addressable memory (TCAM) includes: detecting a defective entry in a ternary content addressable memory (TCAM); marking the defective entry so that the defective entry is visible to a software; and avoiding in using the defective entry. For data that normally would have been written into the defective entry, the data is written into an entry that is subsequent to the defective entry. In another embodiment, the redundancy is provided in a CAM instead of a TCAM.

Claims

1. A method of providing redundancy in a ternary content addressable memory (TCAM), the method comprising:

detecting a defective entry in building block in a ternary content addressable memory (TCAM);

marking the defective entry so that the defective entry is visible to a software; and

avoiding in using the defective entry.

2. The method of claim 1, wherein the building block is formed by an array of TCAM cells.

3. The method of claim 1, wherein the defective entry is detected by use of a built-in self test (BIST) sequence.

4. The method of claim 1, further comprising:

writing an address of the defective entry into a storage area; and

setting a bit associated with the address in order to indicate that the entry is defective.

5. The method of claim 4, wherein the software avoids in using the defective entry by:

reading the storage area in order to determine the defective entry; and

building a remapping table that redirects a query that is directed to the defective entry.

6. The method of claim 5, further comprising:

reading the remapping table so that the software avoids in using the defective entry.

7. The method of claim 1, wherein use of the defective entry is avoided by use of a hardware that remaps at least some of the entries in the TCAM.

8. The method of claim 1, wherein avoiding in using the defective entry comprises:

preventing the software from writing into the defective entry.

9. The method of claim 1, further comprising:

for data that normally would have been written into the defective entry, writing the data into a next available non-defective entry.

10. The method of claim 1, wherein more than one defective entry is detected and the software is prevented from using any defective entry.

11. An apparatus for providing redundancy in a ternary content addressable memory (TCAM), the apparatus comprising:

a ternary content addressable memory (TCAM) comprising at least one building block, wherein a defective entry is detectable in the building block; and

a table configured to permit the marking of the defective entry so that the defective entry is visible to a software, wherein the software avoids in using the defective entry.

12. The apparatus of claim 11, wherein the building block is formed by an array of TCAM cells.

13. The apparatus of claim 11, wherein the defective entry is detected by use of a built-in self test (BIST) sequence.

14. The apparatus of claim 11, wherein marking the defective entry comprises:

writing an address of the defective entry into a storage area; and

setting a bit associated with the address in order to indicate that the entry is defective.

15. The apparatus of claim 14, wherein the software avoids in using the defective entry by:

reading the storage area in order to determine the defective entry; and

building a remapping table that redirects a query that is directed to the defective entry.

16. The apparatus of claim 15, wherein the software reads the remapping table so that the software avoids in using the defective entry.

17. The apparatus of claim 11, further comprising a hardware that remaps at least some of the entries in the TCAM so that the defective entry is not used.

18. The apparatus of claim 11, wherein the software is prevented from writing into the defective entry.

19. The apparatus of claim 11, wherein for data that normally would have been written into the defective entry, the data is written into an entry that is subsequent to the defective entry.

20. A method of providing redundancy in a ternary content addressable memory (TCAM), the method comprising:

detecting a defective entry in building block in a ternary content addressable memory (TCAM);

configuring a failover logic to redirect a software query toward a spare building block and away from the building block with the defective entry; and

avoiding in using the building block with the defective entry.

21. The method of claim 20, wherein the building block is formed by an array of TCAM cells.

22. The method of claim 20, wherein the defective entry is detected by use of a built-in self test (BIST) sequence.

23. The method of claim 20, wherein the software avoids in using the building block with the defective entry and instead uses the spare building block.

24. The method of claim 20, wherein use of the defective building block is avoided by use of a hardware that controls the use of match lines from the defective building block and from the spare building block.

25. The method of claim 20, wherein avoiding in using the building block with the defective entry comprises:

preventing the software from writing into the building block with the defective entry.

26. The method of claim 20, further comprising:

for data that normally would have been written into the building block with the defective entry, writing the data into an entry in the spare building block.

27. The method of claim 20, further comprising:

configuring the failover logic to redirect a software query toward a second spare building block and away from a second building block with another defective entry; and

avoiding in using the second building block with the defective entry.

28. An apparatus for providing redundancy in a ternary content addressable memory (TCAM), the apparatus comprising:

a ternary content addressable memory (TCAM) comprising at least one building block and a spare building block, wherein a defective entry is detectable in the building block; and

a failover logic configured to redirect a software query toward a spare building block and away from the building block with the defective entry, wherein the software avoids in using the building block with the defective entry.

29. The apparatus of claim 28, wherein the building block is formed by an array of TCAM cells.

30. The apparatus of claim 28, wherein the defective entry is detected by use of a built-in self test (BIST) sequence.

31. The apparatus of claim 28, wherein the software avoids in using the building block with the defective entry and instead uses the spare building block.

32. The apparatus of claim 28, further comprising a hardware that controls the use of match lines from the defective building block and from the spare building block so that the defective building block is not used.

33. The apparatus of claim 28 wherein the software is prevented from writing into the building block with the defective entry.

34. The apparatus of claim 28, wherein for data that normally would have been written into the building block with the defective entry, then the data is written into an entry in the spare building block.

35. An article of manufacture, comprising:

a machine-readable medium having stored thereon instructions to;

detect a defective entry in building block in a content addressable memory (CAM);

mark the defective entry so that the defective entry is visible to a software; and

avoid in using the defective entry.

36. The article of manufacture of claim 35, wherein the CAM is a ternary content addressable memory (TCAM).

37. An apparatus for providing redundancy in a content addressable memory (CAM), the method comprising:

means for detecting a defective entry in a building block in a content addressable memory (CAM);

means for marking the defective entry so that the defective entry is visible to a software; and

means for avoiding in using the defective entry.

38. The apparatus of claim 37, wherein the CAM is a ternary content addressable memory (TCAM).