Distortion compensation apparatus

• US 20060215783A1
• Filed: 07/26/2005
• Published: 09/28/2006
• Est. Priority Date: 03/22/2005
• Status: Active Grant

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Ohba, Takeshi, Funyu, Yasuhito, Shako, Hideharu
• Granted Patent: US 7,486,744 B2
• Time in Patent Office: Days
• US Class Current: 375/296
• CPC Class Codes: H03F 1/3241 using predistortion circuits H03F1/3211, H03F1/3217 take precedence
• CPC Class Codes: H03F 1/3294 Acting on the real and imaginary components of the input signal
• CPC Class Codes: H03F 2200/321 Use of a microprocessor in an amplifier circuit or its control circuit
• CPC Class Codes: H03F 2200/336 A I/Q, i.e. phase quadrature, modulator or demodulator being used in an amplifying circuit
• CPC Class Codes: H03F 2201/3233 Adaptive predistortion using lookup table, e.g. memory, RAM, ROM, LUT, to generate the predistortion
• CPC Class Codes: H04B 2001/0425 with linearisation using predistortion
• CPC Class Codes: H04L 27/368 adaptive predistortion

Abstract

A step size parameter μ is adaptively varied when a distortion compensation coefficient is calculated in a distortion compensation apparatus, relation between transmission signal level and step size parameter μ is considered. The distortion compensation apparatus includes a memory storing distortion compensation coefficient in a designated write address, and outputting distortion compensation coefficient being stored in a designated readout address; a predistortion section performing distortion compensation processing onto a transmission signal, using the distortion compensation coefficient being output from memory; and a distortion compensation section calculating an update value of distortion compensation coefficient, based on error component existent between transmission signal before distortion compensation processing and transmission signal after being amplified by an amplifier. Further, the distortion compensation section modifies magnitude of step size parameter determining degree of effect of error component produced on the update value, when calculating the update value of the distortion compensation coefficient.

Claims

1. A distortion compensation apparatus comprising:

a memory storing a distortion compensation coefficient in a designated write address, and outputting a distortion compensation coefficient being stored in a designated readout address;

a predistortion section performing distortion compensation processing onto a transmission signal, using the distortion compensation coefficient being output from said memory; and

a distortion compensation section calculating an update value of the distortion compensation coefficient, based on the error component existent between the transmission signal before said distortion compensation processing and the transmission signal after being amplified by an amplifier,

wherein said distortion compensation section further comprises a function of controlling to modify a degree of effect of the error component produced on the update value, when calculating the update value of the distortion compensation coefficient.

2. The distortion compensation apparatus according to claim 1, wherein the modification of the degree of effect is realized by modifying the magnitude of the parameter to be multiplied by the error component, and

wherein the distortion compensation section comprises:

a memory storing a parameter in advance, corresponding to the integral value of the transmission signal before the distortion compensation processing or the transmission signal after being amplified by the amplifier;

an integrator generating an integral value of the transmission signal before the distortion compensation processing or the transmission signal after being amplified by the amplifier; and

a control means for reading out the parameter corresponding to the output of the integrator from the memory,

wherein the parameter corresponding to the integral value is being set to a smaller value as the integral value becomes larger.

3. The distortion compensation apparatus according to claim 2,

wherein, when the integral value is not larger than a predetermined value, the control means sets the parameter value to zero.

4. The distortion compensation apparatus according to claim 1,

wherein the modification of the degree of effect is realized by modifying the magnitude of the parameter to be multiplied by the error component, and

wherein the distortion compensation apparatus comprises:

a fast Fourier transform circuit performing fast Fourier transform of the transmission signal after being amplified by the amplifier; and

a control means setting an optimal parameter value based on the output of the fast Fourier transform circuit,

wherein, when the magnitude of the parameter is expressed by ½

ⁿ, said control means varies said n value by the step of ±

1 in the direction of decreasing the power amount of the noise floor which is produced in the output of the fast Fourier transform circuit after the distortion compensation coefficient is updated.

5. The distortion compensation apparatus according to claim 4,

wherein, when the power amount of the noise floor is not varied, the control means selects a smaller value out of the parameter values.

6. The distortion compensation apparatus according to claim 1,

wherein, at the time of the start of transmission, or the occurrence of a fluctuation not smaller than a predetermined magnitude in the transmission output, the control means sets the step size parameter value to a predetermined magnitude until a certain time elapses from the time of the start of the transmission or the occurrence of the fluctuation, and after a lapse of the certain time, the control means controls to make the step size parameter value to a smaller value than the predetermined magnitude.