System and method for multiple cache-line size communications
First Claim
1. A compatible cache-line communication system, comprising:
- a plurality of first ports, each first port configured to receive communications from a first type of device that uses a first cache-line size; and
a plurality of second ports, each second port configured to receive communications from a second type of device that uses a second cache-line size, such that communications between the first type of devices are enabled over a plurality of first routes, such that communications between the second type of devices are enabled over a plurality of second routes, and such that communications between the first type of devices and the second type of devices are disabled.
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Abstract
A system and method for facilitating communications between a plurality of devices that communicate using different cache-line sizes are disclosed. Briefly described, in architecture, one exemplary embodiment of a compatible cache-line communication system employs a plurality of first ports, each first port configured to receive communications from a first type of device that uses a first cache-line size; and a plurality of second ports, each second port configured to receive communications from a second type of device that uses a second cache-line size, such that communications between the first type of devices are enabled over a plurality of first routes, such that communications between the second type of devices are enabled over a plurality of second routes, and such that communications between the first type of devices and the second type of devices are disabled.
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Citations
23 Claims
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1. A compatible cache-line communication system, comprising:
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a plurality of first ports, each first port configured to receive communications from a first type of device that uses a first cache-line size; and
a plurality of second ports, each second port configured to receive communications from a second type of device that uses a second cache-line size, such that communications between the first type of devices are enabled over a plurality of first routes, such that communications between the second type of devices are enabled over a plurality of second routes, and such that communications between the first type of devices and the second type of devices are disabled. - View Dependent Claims (3, 4, 5, 6)
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2. The system of claim 2, further comprising at least one crossbar device that communicatively couples to the plurality of first ports and the plurality of second ports.
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7. A method for facilitating communications between a plurality of devices that communicate using different cache-line sizes, the method comprising:
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determining the cache-line size of a first device;
determining the cache-line size of a second device; and
enabling a communication route between the first device and the second device when the determined cache-line sizes correspond. - View Dependent Claims (8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21)
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22. A system for facilitating communications between a plurality of devices that communicate using different cache-line sizes, comprising:
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means for determining the cache-line size of a first device and for determining the cache-line size of a second device;
means for enabling a communication route between the first device and the second device when the determined cache-line sizes correspond; and
means for disabling the communication route between the first device and the second device when the determined cache-line sizes do not correspond.
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23. A program for facilitating communications between a plurality of devices that communicate using different cache-line sizes stored on computer-readable medium, the program comprising logic configured to perform:
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determining the cache-line size of a first device;
determining the cache-line size of a second device;
enabling a communication route between the first device and the second device when the determined cache-line sizes correspond; and
disabling the communication route between the first device and the second device when the determined cache-line sizes do not correspond.
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Specification