Semiconductor device and fabrication method of the same

• US 20060220042A1
• Filed: 03/30/2006
• Published: 10/05/2006
• Est. Priority Date: 03/31/2005
• Status: Active Grant

• Current Assignee: Eudyna Devices Inc. (Sumitomo Corporation)
• Original Assignee: Eudyna Devices Inc. (Sumitomo Corporation)
• Inventors: Nakata, Ken, Kawasaki, Takeshi, Yaegashi, Seiji
• Granted Patent: US 7,728,353 B2
• Time in Patent Office: Days
• US Class Current: 257/94
• CPC Class Codes: H01L 21/28575 on semiconductor bodies comprising AIIIBV compounds
• CPC Class Codes: H01L 21/28581 Deposition of Schottky electrodes
• CPC Class Codes: H01L 29/2003 Nitride compounds
• CPC Class Codes: H01L 29/66318 Heterojunction transistors
• CPC Class Codes: H01L 29/66462 with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT

Abstract

A semiconductor device includes a mask layer having openings on a substrate, a GaN-based semiconductor layer selectively formed on the substrate with the mask layer that serves as a mask, a gate electrode and either a source electrode or an emitter electrode formed on the GaN-based semiconductor layer, and a drain electrode or a collector electrode connected on a surface of the first semiconductor layer that faces the GaN-based semiconductor layer or an opposite side of the first semiconductor layer.

Claims

1. A semiconductor device comprising:

a mask layer having openings on a substrate;

a GaN-based semiconductor layer selectively formed on the substrate with the mask layer that is used as a mask;

a gate electrode and either a source electrode or an emitter electrode formed on the GaN-based semiconductor layer; and

a drain electrode or a collector electrode formed either on or below the GaN-based semiconductor layer.

2. The semiconductor device as claimed in claim 1, wherein the substrate is one of a SiC substrate, a sapphire substrate, a Si substrate and a semiconductor substrate that includes GaN.

3. The semiconductor device as claimed in claim 1, wherein the mask layer includes at least one of a silicon oxide film, a silicon nitride film, a titanic oxide film, and a zirconium oxide film.

4. The semiconductor device as claimed in claim 1, wherein the mask layer has a thickness of 100 nm or less.

5. The semiconductor device as claimed in claim 1, wherein island-shaped GaN-based semiconductor layers are formed on a chip.

6. A semiconductor device comprising:

a first semiconductor layer formed on a substrate;

a GaN-based semiconductor layer selectively grown on the first semiconductor layer;

a gate electrode formed on side faces of the GaN-based semiconductor layer;

a source electrode or an emitter electrode formed on the GaN-based semiconductor layer; and

a drain electrode or a collector electrode connected on a surface of the first semiconductor layer that faces the GaN-based semiconductor layer or below an opposite surface of the first semiconductor layer.

7. The semiconductor device as claimed in claim 6, wherein the substrate is one of a SiC substrate, a sapphire substrate, a Si substrate and a semiconductor substrate that includes GaN.

8. The semiconductor device as claimed in claim 6, wherein the mask layer is provided between the first semiconductor layer and the gate electrode.

9. The semiconductor device as claimed in claim 8, wherein the mask layer includes at least one of a silicon oxide film, a silicon nitride film, a titanic oxide film, and a zirconium oxide film.

10. The semiconductor device as claimed in claim 8, wherein the mask layer has a thickness of 100 nm or less.

11. The semiconductor device as claimed in claim 6, further comprising a seed layer provided between the first semiconductor layer and the GaN-based semiconductor layer.

12. The semiconductor device as claimed in claim 11, wherein a semiconductor layer that includes AlN is formed to cover the first semiconductor layer, before the seed layer is formed.

13. The semiconductor device as claimed in claim 6, wherein island-shaped GaN-based semiconductor layers are formed on a chip.

14. A fabrication method of a semiconductor device comprising:

forming a mask layer having openings on a substrate;

forming a GaN-based semiconductor layer selectively on the substrate with the mask layer that is used as a mask;

forming a gate electrode and either a source electrode or an emitter electrode on the GaN-based semiconductor layer; and

forming a drain electrode or a collector electrode formed either on or below the GaN-based semiconductor layer.

15. The fabrication method of the semiconductor device as claimed in claim 14, wherein the step of forming the mask layer is a step of forming the mask layer having island-shaped openings.

16. The fabrication method of the semiconductor device as claimed in claim 14, wherein the step of forming the GaN-based semiconductor layer is a step of forming the GaN-based semiconductor layer by MOCVD or MBE.

17. The fabrication method of the semiconductor device as claimed in claim 14, wherein the mask layer includes at least one of a silicon oxide film, a silicon nitride film, a titanic oxide film, and a zirconium oxide film.

18. The fabrication method of the semiconductor device as claimed in claim 14, wherein island-shaped GaN-based semiconductor layers are formed on a chip.

19. A fabrication method of a semiconductor device comprising:

forming a first semiconductor layer on a substrate;

forming a mask layer having openings on the first semiconductor layer;

selectively forming a GaN-based semiconductor layer in the openings on the first semiconductor layer;

forming a gate electrode on side faces of the GaN-based semiconductor layer;

forming a source electrode or an emitter electrode on the GaN-based semiconductor layer; and

forming a drain electrode or a collector electrode connected on a surface of the first semiconductor layer that faces the GaN-based semiconductor layer or below an opposite surface of the first semiconductor layer.

20. The fabrication method of the semiconductor device as claimed in claim 19, wherein the first semiconductor layer is a SiC layer or the GaN-based semiconductor layer.

21. The fabrication method of the semiconductor device as claimed in claim 19, wherein a surface of the first semiconductor layer is covered with a semiconductor layer that includes AlN.

22. The fabrication method of the semiconductor device as claimed in claim 19, wherein the first semiconductor layer is an n-type semiconductor layer formed on an n-type semiconductor substrate.

23. The fabrication method of the semiconductor device as claimed in claim 19, wherein the first semiconductor layer includes a p-type semiconductor layer formed on a p-type substrate and an n-type semiconductor layer formed thereon.

24. The fabrication method of the semiconductor device as claimed in claim 19, wherein the step of forming the GaN-based semiconductor layer is a step of forming the GaN-based semiconductor layer by MOCVD or MBE.

25. The fabrication method of the semiconductor device as claimed in claim 19, wherein the mask layer includes at least one of a silicon oxide film, a silicon nitride film, a titanic oxide film, and a zirconium oxide film.

26. The fabrication method of the semiconductor device as claimed in claim 19, wherein the step of forming the mask layer is a step of forming the mask layer having island-shaped openings.

27. The fabrication method of the semiconductor device as claimed in claim 19, wherein island-shaped GaN-based semiconductor layers are formed on a chip.