SEMICONDUCTOR DEVICE INCLUDING A DOPANT BLOCKING SUPERLATTICE

• US 20060220118A1
• Filed: 05/01/2006
• Published: 10/05/2006
• Est. Priority Date: 06/26/2003
• Status: Abandoned Application

• Current Assignee: Mears Technologies Incorporated
• Original Assignee: RJ Mears LLC (Atomera Incorporated)
• Inventors: Hytha, Marek, Stephenson, Robert John
• Application Number:
  US11/380,987
• Publication Number:
  US 20060220118A1
• Time in Patent Office: Days
• US Class Current: 257/336
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: H01L 29/1054 with a variation of the composition, e.g. channel with strained layer for increasing the mobility
• CPC Class Codes: H01L 29/1083 with an inactive supplementary region, e.g. for preventing punch-through, improving capacity effect or leakage current
• CPC Class Codes: H01L 29/151 Compositional structures H01L29/157 and H01L29/158 take precedence
• CPC Class Codes: H01L 29/7833 with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's for thin film transistors H01L29/78618

Abstract

A semiconductor device may include at least one metal oxide field-effect transistor (MOSFET). The at least one MOSFET may include a body, a channel layer adjacent the body, and a dopant blocking superlattice between the body and the channel layer. The dopant blocking superlattice may include a plurality of stacked groups of layers. Each group of layers of the dopant blocking superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.

Claims

1. A semiconductor device comprising:

at least one metal oxide field-effect transistor (MOSFET) comprising

a body,

a channel layer adjacent said body, and

a dopant blocking superlattice between said body and said channel layer and comprising a plurality of stacked groups of layers, each group of layers of said dopant blocking superlattice comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.

2. The semiconductor device of claim 1 wherein said body has at least one doped region therein.

3. The semiconductor device of claim 1 wherein said body has a dopant concentration of greater than about 1×

10¹⁸ cm<sup>−

3</sup>.

4. The semiconductor device of claim 1 wherein said channel layer is substantially undoped.

5. The semiconductor device of claim 1 wherein said channel layer has a dopant concentration of less than about 1×

10¹⁵ cm<sup>−

3</sup>.

6. The semiconductor device of claim 1 wherein at least one group of layers of said dopant blocking superlattice is substantially undoped.

7. The semiconductor device of claim 1 wherein said base semiconductor comprises silicon.

8. The semiconductor device of claim 7 wherein said at least one non-semiconductor monolayer comprises oxygen.

9. The semiconductor device of claim 1 wherein said at least one non-semiconductor monolayer comprises a non-semiconductor selected from the group consisting essentially of oxygen, nitrogen, fluorine, and carbon-oxygen.

10. The semiconductor device of claim 1 further comprising a gate overlying said channel layer.

11. The semiconductor device of claim 10 further comprising source and drain regions laterally adjacent said channel layer.

12. The semiconductor device of claim 10 wherein said gate comprises a gate insulating layer adjacent said semiconductor channel layer, and a gate electrode adjacent said gate insulating layer.

13. The semiconductor device of claim 1 wherein said at least one non-semiconductor monolayer is a single monolayer thick.

14. The semiconductor device of claim 1 wherein said base semiconductor portion is less than eight monolayers thick.

15. The semiconductor device of claim 1 wherein all of said base semiconductor portions are a same number of monolayers thick.

16. The semiconductor device of claim 1 wherein at least some of said base semiconductor portions are a different number of monolayers thick.

17. The semiconductor device of claim 1 wherein opposing base semiconductor monolayers in adjacent groups of layers of said superlattice are chemically bound together.

18. A semiconductor device comprising:

at least one metal oxide field-effect transistor (MOSFET) comprising

a body,

a channel layer adjacent said body,

a gate overlying said channel layer,

source and drain regions laterally adjacent said channel layer, and

a dopant blocking superlattice between said body and said channel layer and comprising a plurality of stacked groups of layers, each group of layers of said dopant blocking superlattice comprising a plurality of stacked base silicon monolayers defining a base silicon portion and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions.

19. The semiconductor device of claim 18 wherein said body has at least one doped region therein.

20. The semiconductor device of claim 18 wherein said body has a dopant concentration of greater than about 1×

10¹⁸ cm<sup>−

3</sup>.

21. The semiconductor device of claim 18 wherein said channel layer is substantially undoped.

22. The semiconductor device of claim 18 wherein said channel layer has a dopant concentration of less than about 1×

10¹⁵ cm<sup>−

3</sup>.

23. The semiconductor device of claim 18 wherein at least one group of layers of said dopant blocking superlattice is substantially undoped.