Tolerant input circuit

• US 20060220686A1
• Filed: 09/27/2005
• Published: 10/05/2006
• Est. Priority Date: 03/29/2005
• Status: Active Grant

• Current Assignee: Socionext Inc.
• Original Assignee: Fujitsu Limited
• Inventors: Iwamoto, Masahiro, Suzuki, Toyoki, Uno, Osamu, Tomida, Mitsuaki
• Granted Patent: US 7,501,852 B2
• Time in Patent Office: Days
• US Class Current: 326/83
• CPC Class Codes: H03K 19/00315 in field-effect transistor circuits
• CPC Class Codes: H03K 19/018507 Interface arrangements

Abstract

A tolerant input circuit that functions stably regardless of fabrication differences without having to adjust the threshold value of an input circuit. The tolerant input circuit includes a step-down device configured by an N-channel MOS transistor connected between an input pad and the input circuit. Voltage from a power supply is supplied to the gate of the N-channel MOS transistor in the step-down device to decrease the voltage of a high voltage signal provided to the input pad to the voltage of the power supply or lower. The signal with decreased voltage is provided to the input circuit. The tolerant input circuit includes a back gate voltage control circuit for increasing back gate voltage of the N-channel MOS transistor in the step-down device when the input pad is provided with a high voltage signal.

Claims

1. A tolerant input circuit for connection to a power supply and an input pad, the tolerant input circuit comprising:

an input circuit;

a step-down device including a first N-channel MOS transistor connected between the input pad and the input circuit, the first N-channel MOS transistor of the step-down device having a gate supplied with voltage from the power supply, wherein voltage of a high voltage signal provided to the input pad is decreased to a value lower than or equal to that of the voltage of the power supply by the step-down device and provided to the input circuit, the first N-channel MOS transistor including a back gate; and

a back gate voltage control circuit, connected to the back gate of the first N-channel MOS transistor in the step-down device, for increasing back gate voltage of the first N-channel MOS transistor in the step-down device when the input pad is provided with the high voltage signal.

2. The tolerant input circuit according to claim 1, wherein the back gate voltage control circuit includes a second N-channel MOS transistor connected between the input pad and the back gate of the first N-channel MOS transistor in the step-down device and having a gate connected to the power supply.

3. The tolerant input circuit according to claim 1, wherein the back gate voltage control circuit includes:

a second N-channel MOS transistor connected between the input pad and the back gate of the first N-channel MOS transistor in the step-down device, the second N-channel MOS transistor including a back gate; and

a third N-channel MOS transistor connected between the input pad and the back gate of the second N-channel MOS transistor.

4. The tolerant input circuit according to claim 1, wherein the back gate voltage control circuit is configured by connecting the back gate and source of the first N-channel MOS transistor in the step-down device.

5. The tolerant input circuit according to claim 1, further comprising:

a voltage control circuit, connected to the input pad and the gate of the first N-channel MOS transistor in the step-down device, for supplying the gate of the first N-channel MOS transistor in the step-down device with the high voltage signal when the input pad is provided with the high voltage signal having voltage greater than or equal to that of the power supply.

6. The tolerant input circuit according to claim 5, wherein the tolerant input circuit is connected to an output buffer circuit including a P-channel MOS transistor, and the voltage control circuit controls back gate voltage of the P-channel MOS transistor.

7. The tolerant input circuit according to claim 1, further comprising:

an N-channel MOS transistor diode-connected between the power supply and a node, which is between the input circuit and the step-down device.

8. A tolerant input circuit for connection to a power supply and an input pad, the tolerant input circuit comprising:

an input circuit;

a first N-channel MOS transistor connected between the input pad and the input circuit, the first N-channel MOS transistor having a gate connected to the power supply, the first N-channel MOS transistor including a back gate; and

a second N-channel MOS transistor connected between the input pad and the back gate of the first N-channel MOS transistor.

9. The tolerant input circuit according to claim 8, wherein the second N-channel MOS transistor includes a gate connected to the power supply and a back gate connected to ground.

10. The tolerant input circuit according to claim 8, further comprising:

an N-channel MOS transistor diode-connected between the power supply and a node, which is between the input circuit and the first N-channel MOS transistor.

11. The tolerant input circuit according to claim 8, further comprising:

a third N-channel MOS transistor connected between the input pad and a back gate of the second N-channel MOS transistor.

12. The tolerant input circuit according to claim 11, wherein the third N-channel MOS transistor includes a gate connected to the power supply and a back gate connected to ground.

13. The tolerant input circuit according to claim 8, further comprising:

a first P-channel MOS transistor connected between the gate of the first N-channel MOS transistor and the power supply, the first P-channel MOS transistor having a gate connected to the input pad and a back gate connected to the gate of the first N-channel MOS transistor; and

a second P-channel MOS transistor connected between the gate of the first N-channel MOS transistor and the input pad, the second P-channel MOS transistor having a gate connected to the power supply and a back gate connected to the gate of the first N-channel MOS transistor.

14. A tolerant input circuit for connection to a power supply and an input pad, the tolerant input circuit comprising:

an input circuit;

a first N-channel MOS transistor connected between the input pad and the input circuit, the first N-channel MOS transistor having a gate connected to the power supply and a back gate connected to a node between the first N-channel MOS transistor and the input circuit.

15. The tolerant input circuit according to claim 14, further comprising:

a second N-channel MOS transistor diode-connected between the power supply and the node.