Solid state imaging apparatus and driving method of the solid state imaging apparatus

• US 20060220933A1
• Filed: 03/31/2006
• Published: 10/05/2006
• Est. Priority Date: 03/31/2005
• Status: Active Grant

• Current Assignee: Fujifilm Corporation (Fujifilm Holdings Corporation)
• Original Assignee: Fuji Photo Film Co Limited (Fujifilm Holdings Corporation)
• Inventors: Yamada, Tetsuo
• Granted Patent: US 7,697,048 B2
• Time in Patent Office: Days
• US Class Current: 341/76
• CPC Class Codes: H04N 25/00 Circuitry of solid-state image sensors [SSIS]; Control thereof
• CPC Class Codes: H04N 25/46 by combining or binning pixels
• CPC Class Codes: H04N 25/702 SSIS architectures characterised by non-identical, non-equidistant or non-planar pixel layout
• CPC Class Codes: H04N 25/71 Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors

Abstract

A solid state imaging apparatus of which spatial phases of pixels forming a first matrix of adjoining rows and adjoining columns are relatively different from each other is characterized by that an intersection of a line between two pixels to be added in a row direction and a line between two pixels to be added in a column direction approximately agreed with a center of four pixels to be added when the four pixels adjoining in the row and column directions are added, and phases of said centers of four pixels adjoining in the row direction or column direction are relatively different from each other in a second matrix consisted of a plurality of said centers of four pixels.

Claims

1. A solid state imaging apparatus of which spatial phases of pixels forming a first matrix of adjoining rows and adjoining columns are relatively different from each other, wherein

an intersection of a line between two pixels to be added in a row direction and a line between two pixels to be added in a column direction approximately agreed with a center of four pixels to be added when the four pixels adjoining in the row and column directions are added, and

phases of said centers of four pixels adjoining in the row direction or column direction are relatively different from each other in a second matrix consisted of a plurality of said centers of four pixels.

2. A solid state imaging apparatus, comprising:

a plurality of pixels forming a first matrix of adjoining rows and adjoining columns, a spatial phase of each pixel being relatively different;

a plurality of vertical transfer devices which transfer signals of two rows of the pixels of which phases are different in column direction in parallel as one line;

a line memory that receives and temporarily stores said one line of signal electric charges transferred in parallel;

a horizontal transfer device to which a plurality of electrically independent control voltages are impressed and which receives the signal electric charges selectively read out from said line memory and transfers the signal electric charges serially to a horizontal direction; and

an output device that converts the signal electric charges transferred by the horizontal transfer device into voltage and outputs the voltage,

wherein a signal of one pixel at a cycle of four-pixel consisting one group of four signals horizontally adjoining with each another in said one line of the signal electric charges is added to a signal of a preceding line adjoining to said one line, transferred before said one line and accumulated in said horizontal transfer device;

after all the signal electric charges in the horizontal transfer device are output, signals of three pixels in said one group remaining in said line memory are added in the horizontal transfer device to vacate said line memory, and simultaneously a succeeding line of signal electric charges accumulated in said vertical transfer device are transferred to said line memory; and

a signal of one pixel at a cycle of four-pixel consisting one group of four signals horizontally adjoining with each another in another line of the signal electric charges of which spatial phase is 180 degree different from a spatial phase of said one pixel in said one line is selectively read out from said line memory to said horizontal transfer device and added to said added signals of three pixels.

3. The solid state imaging apparatus according to claim 2, wherein, when the signals of four pixels are added, each set of the signals of two pixels are added separately in said horizontal transfer device and output to said output device as two sets of two-pixel added signals, and said two sets of two-pixel added signals are added in said output device to obtain a four-pixel added signal.

4. The solid state imaging apparatus according to claim 2, wherein, when the signals of four pixels are added, each set of the signals of two pixels are added separately in said horizontal transfer device and output to said output device as two sets of two-pixel added signals, and said two sets of two-pixel added signals are added in an external processor to obtain a four-pixel added signal.

5. The solid state imaging apparatus according to claim 2, wherein, when the signals of four pixels are added, signals of four pixels are added in said horizontal transfer device and arranged in every two transfer steps of said horizontal transfer device to form a first four-pixel added signal line, then signals of four pixels in succeeding line are added to form a second four-pixel added signal line and alternatively arranged in transfer steps of said horizontal transfer device with said first four-pixel added signal line, and thereafter by operating said horizontal transfer device, said first four-pixel added signal line and said second four-pixel added signal line are alternatively and time sequentially output from said output device.

6. A solid state imaging apparatus, comprising:

a plurality of pixels forming a first matrix of adjoining rows and adjoining columns, a spatial phase of each pixel being relatively different;

a plurality of vertical transfer devices which transfer signals of two rows of the pixels of which phases are different in column direction in parallel as one line;

a line memory that receives and temporarily stores said one line of signal electric charges transferred in parallel;

a horizontal transfer device to which a plurality of electrically independent control voltages are impressed and which receives the signal electric charges selectively read out from said line memory and transfers the signal electric charges serially to a horizontal direction; and

an output device that converts the signal electric charges transferred by the horizontal transfer device into voltage and outputs the voltage,

wherein signals of three pixels at a cycle of four-pixel consisting one group of four signals horizontally adjoining with each another in said one line of the signal electric charges are added to a signal of a preceding line adjoining to said one line, transferred before said one line and accumulated in said horizontal transfer device;

after all the signal electric charges in the horizontal transfer device are output, a signal of one pixel in said one group remaining in said line memory is transferred to the horizontal transfer device to vacate said line memory, and simultaneously a succeeding line of signal electric charges accumulated in said vertical transfer device are transferred to said line memory; and

signals of three pixels at a cycle of four-pixel consisting one group of four signals horizontally adjoining with each another in another line of the signal electric charges of which spatial phase is 180 degree different from a spatial phase of said three pixels in said one line are selectively read out from said line memory to said horizontal transfer device and added to previously transferred said signal of one pixel.

7. The solid state imaging apparatus according to claim 6, wherein, when the signals of four pixels are added, each set of the signals of two pixels are added separately in said horizontal transfer device and output to said output device as two sets of two-pixel added signals, and said two sets of two-pixel added signals are added in said output device to obtain a four-pixel added signal.

8. The solid state imaging apparatus according to claim 6, wherein, when the signals of four pixels are added, each set of the signals of two pixels are added separately in said horizontal transfer device and output to said output device as two sets of two-pixel added signals, and said two sets of two-pixel added signals are added in an external processor to obtain a four-pixel added signal.

9. The solid state imaging apparatus according to claim 6, wherein, when the signals of four pixels are added, signals of four pixels are added in said horizontal transfer device and arranged in every two transfer steps of said horizontal transfer device to form a first four-pixel added signal line, then signals of four pixels in succeeding line are added to form a second four-pixel added signal line and alternatively arranged in transfer steps of said horizontal transfer device with said first four-pixel added signal line, and thereafter by operating said horizontal transfer device, said first four-pixel added signal line and said second four-pixel added signal line are alternatively and time sequentially output from said output device.