Compensating for coupling during read operations on non-volatile memory

• US 20060221692A1
• Filed: 04/05/2005
• Published: 10/05/2006
• Est. Priority Date: 04/05/2005
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: SanDisk Corporation (Western Digital Corporation)
• Inventors: Chen, Jian
• Granted Patent: US 7,196,928 B2
• Time in Patent Office: Days
• US Class Current: 365/185.110
• CPC Class Codes: G11C 11/5642 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/3418 Disturbance prevention or evaluation; Refreshing of disturbed memory data
• CPC Class Codes: G11C 16/3422 Circuits or methods to evaluate read or write disturbance in nonvolatile memory, without steps to mitigate the problem
• CPC Class Codes: G11C 2211/5634 Reference cells
• CPC Class Codes: G11C 2211/5648 Multilevel memory programming, reading or erasing operations wherein the order or sequence of the operations is relevant

Abstract

Shifts in the apparent charge stored on a floating gate (or other charge storing element) of a non-volatile memory cell can occur because of the coupling of an electric field based on the charge stored in adjacent floating gates (or other adjacent charge storing elements). The problem occurs most pronouncedly between sets of adjacent memory cells that have been programmed at different times. To compensate for this coupling, the read process for a given memory cell will take into account the programmed state of an adjacent memory cell.

Claims

1. A method for reading non-volatile storage, comprising:

performing a read process for a set of non-volatile storage elements using a set of one or more read compare points, said read process provides a set of read data;

determining whether said read data has one or more errors;

determining whether an error correction process is able to correct said one or more errors;

correcting said one or more errors using said error correction process if said error correction process is able to correct said one or more errors; and

performing a data recovery process if said error correction process is not able to correct said one or more errors, said data recovery process comprises reading non-volatile storage elements adjacent to said a set of non-volatile storage elements, adjusting said one or more read compare points for at least a subset of said set of non-volatile storage elements based on reading of said non-volatile storage elements adjacent to said set of non-volatile storage elements and performing another one or more read processes for said set of non-volatile storage elements using said adjusted one or more read compare points.

2. A method according to claim 1, wherein:

said set of non-volatile storage elements includes a page of data;

said set of non-volatile storage elements are connected to a first word line;

said non-volatile storage elements adjacent to said set of non-volatile storage elements are connected to a second word line adjacent to said first word line; and

said error correction process uses error correction codes.

3. A method according to claim 1, wherein:

said adjusting said one or more read compare points includes changing a reference voltage by an offset voltage.

4. A method according to claim 1, wherein:

said adjusting said one or more read compare points includes changing a reference voltage by one or a set of offsets; and

said set of offsets includes an offset for each programmed data state.

5. A method according to claim 1, wherein:

said performing another one or more read processes includes performing multiple read processes, each read process uses a different one of a predetermined set of offsets and is performed on all of said set of non-volatile storage elements, there is at least one read process for each offset, each non-volatile storage element provides final data from an appropriate one of said read processes associated with said offset associated with an adjacent non-volatile storage element for the respective non-volatile storage element.

6. A method according to claim 1, wherein said adjusting said one or more read compare points and said performing another one or more read processes comprise:

performing a first read process without adjusting said one or more read compare points and storing results for one or more non-volatile storage elements having an adjacent non-volatile storage element in a first state; and

performing a second read process with a first adjustment to said one or more read compare points and storing results for one or more non-volatile storage elements having an adjacent non-volatile storage element in a second state.

7. A method according to claim 1, wherein said adjusting said one or more read compare points and said performing another one or more read processes comprise:

performing a first read process without adjusting said one or more read compare points and storing results for one or more non-volatile storage elements having an adjacent non-volatile storage element in a first state;

performing a second read process with a first adjustment to said one or more read compare points and storing results for one or more non-volatile storage elements having an adjacent non-volatile storage element in a second state;

performing a third read process with a second adjustment to said one or more read compare points and storing results for one or more non-volatile storage elements having an adjacent non-volatile storage element in a third state; and

performing a fourth read process with a third adjustment to said one or more read compare points and storing results for one or more non-volatile storage elements having an adjacent non-volatile storage element in a fourth state.

8. A method according to claim 1, wherein:

said set of non-volatile storage elements are connected to a first word line;

said non-volatile storage elements adjacent to said set of non-volatile storage elements are connected to a second word line adjacent to said first word line;

said first and second word lines are part of a memory system having N word lines where an Nth word line is programmed last in sequence; and

said data recovery process is performed for all of said word lines except said Nth word line.

9. A method according to claim 1, further comprising:

reporting results of said data recovery process.

10. A method according to claim 1, wherein:

said set of non-volatile storage elements are connected to a first word line; and

said set of non-volatile storage elements are connected to consecutive bit lines.

11. A method according to claim 1, wherein:

said set of non-volatile storage elements are connected to a first word line; and

said set of non-volatile storage elements are connected to every other bit line of a group of bit lines.

12. A method according to claim 1, wherein:

said set of non-volatile storage elements are flash memory devices.

13. A method according to claim 1, wherein:

said set of non-volatile storage elements are NAND flash memory devices.

14. A method according to claim 1, wherein:

said set of non-volatile storage elements are multi-state flash memory devices.

15. A method according to claim 1, wherein:

said set of non-volatile storage elements include floating gates.

16. A method according to claim 1, wherein:

said set of non-volatile storage elements each include a dielectric region for storing charge.

17. A method for reading non-volatile storage, comprising:

performing a read process for a set of non-volatile storage elements, said read process includes using a set of reference values to determine a set of read data stored in said set of non-volatile storage elements;

determining that said read data has one or more errors that cannot be corrected by an error correction process; and

performing a data recovery process for said set of non-volatile storage elements that includes using a set of offsets with said reference values to determine a corrected set of read data, said offsets are chosen on an individual basis for said set of non-volatile storage elements based on status of respective adjacent storage elements to said set of non-volatile storage elements.

18. A method according to claim 17, wherein:

said set of non-volatile storage elements store a page of data;

said set of non-volatile storage elements are connected to a first word line; and

said adjacent storage elements are connected to a second word line adjacent to said first word line.

19. A method according to claim 17, wherein:

said data recovery processes includes performing multiple read processes, each read process uses a different one of said offsets and is performed on all of said set of non-volatile storage elements, there is at least one read process for each offset, each non-volatile storage element provides final data from an appropriate one of said read processes.

20. A method according to claim 17, wherein said data recovery processes comprises:

performing a first read process without using an offset and storing results for one or more of said set of non-volatile storage elements having an adjacent non-volatile storage element in a first state;

performing a second read process using a first offset and storing results for one or more of said set of non-volatile storage elements having an adjacent non-volatile storage element in a second state;

performing a third read process using a second offset and storing results for one or more of said set of non-volatile storage elements having an adjacent non-volatile storage element in a third state; and

performing a fourth read process using a third offset and storing results for one or more of said set of non-volatile storage elements having an adjacent non-volatile storage element in a fourth state.

21. A method according to claim 17, wherein:

said set of non-volatile storage elements are connected to a first word line that is part of a memory system having N word lines where an Nth word line is programmed last in sequence; and

said data recovery process is performed for all of said word lines except said Nth word line

22. A method according to claim 17, further comprising:

reporting results of said data recovery process.

23. A method according to claim 17, wherein:

said set of non-volatile storage elements are NAND flash memory devices.

24. A method according to claim 17, wherein:

said set of non-volatile storage elements are multi-state flash memory devices.

25. A non-volatile memory system, comprising:

a set of non-volatile storage elements; and

one or more managing circuits in communication with said set of non-volatile storage elements, said one or more managing circuits perform a read process for a set of non-volatile storage elements using a set of reference values to determine said set of read data stored in said set of non-volatile storage elements, said one or more managing circuits capable of determining that said read data has one or more errors that cannot be corrected by an error correction process and performing a data recovery process if said error correction process is not able to correct said one or more errors, said data recovery process comprises reading non-volatile storage elements adjacent to said a set of non-volatile storage elements and adjusting at least a subset of said reference values based on reading of said non-volatile storage elements adjacent to said set of non-volatile storage elements and performing another one or more read processes for said set of non-volatile storage elements using said adjusted reference values.

26. A non-volatile memory system according to claim 25, wherein said adjusting said reference values and said performing another one or more read processes comprises:

performing multiple read processes, each read process uses a different one of a predetermined set of offsets and is performed on all of said set of non-volatile storage elements, there is at least one read process for each offset, each of at least a subset of said set of non-volatile storage element provides final data from an appropriate one of said read processes associated with said offset associated with an adjacent non-volatile storage element for the respective non-volatile storage element.

27. A non-volatile memory system according to claim 25, wherein said adjusting said reference values and said performing another one or more read processes comprises:

performing a first read process without adjusting said reference values and storing results for one or more of said set of non-volatile storage elements having an adjacent non-volatile storage element in a first state; and

performing a second read process with a first adjustment to said reference values and storing results for one or more of said set of non-volatile storage elements having an adjacent non-volatile storage element in a second state.

28. A non-volatile memory system according to claim 25, wherein said adjusting said reference values and said performing another one or more read processes comprises:

performing a first read process without adjusting said reference values and storing results for one or more of said set of non-volatile storage elements having an adjacent non-volatile storage element in a first state;

performing a second read process with a first adjustment to said reference values and storing results for one or more of said set of non-volatile storage elements having an adjacent non-volatile storage element in a second state;

performing a third read process with a second adjustment to said reference values and storing results for one or more of said set of non-volatile storage elements having an adjacent non-volatile storage element in a third state; and

performing a fourth read process with a third adjustment to said reference values and storing results for one or more of said set of non-volatile storage elements having an adjacent non-volatile storage element in a fourth state.

29. A non-volatile memory system according to claim 25, wherein:

said one or more managing circuits include one or more of a state machine, a decoder, sense circuits and a controller;

said set of non-volatile storage elements are part of an array of non-volatile storage elements, said array of non-volatile storage elements include word lines and bit lines;

said set of non-volatile storage elements are connected to a first word line; and

said non-volatile storage elements adjacent to said set of non-volatile storage elements are connected to a second word line adjacent to said first word line.

30. A non-volatile memory system according to claim 25, wherein:

said set of non-volatile storage elements are NAND flash memory devices.

31. A non-volatile memory system according to claim 25, wherein:

said set of non-volatile storage elements are multi-state flash memory devices.

32. A non-volatile memory system according to claim 25, wherein:

said non-volatile storage elements of said set of non-volatile storage elements include floating gates.

33. A non-volatile memory system according to claim 25, wherein:

said non-volatile storage elements of said set of non-volatile storage elements include dielectric regions for storing charge.

34. A method for reading a set of non-volatile storage elements, comprising:

for each non-volatile storage element of at least a subset of said non-volatile storage elements, determining an offset from a predetermined set of offsets based on a charge level stored in an adjacent storage element; and

performing a set of read processes for said set of non-volatile storage elements, each read process of said set uses a different one of said predetermined set of offsets and is performed on all of said set of non-volatile storage elements, there is at least one read process for each offset, each of at least said subset of said set of non-volatile storage element provides final data from an appropriate one of said read processes associated with said offset determined for the respective non-volatile storage element.

35. A method according to claim 34, wherein:

said set of non-volatile storage elements store a first page of data; and

said set of non-volatile storage elements are connected to a first word line.

36. A method according to claim 34, wherein:

said determining an offset from a predetermined set of offsets includes reading a state of said adjacent storage element and correlating said state with said set of offsets.

37. A method according to claim 34, wherein said set of read processes comprises:

performing a first read process using a first offset and storing results for one or more non-volatile storage elements having an adjacent non-volatile storage element in a first state;

performing a second read process using a second offset and storing results for one or more non-volatile storage elements having an adjacent non-volatile storage element in a second state; and

performing a third read process with using a second offset and storing results for one or more non-volatile storage elements having an adjacent non-volatile storage element in a third state.

38. A flash memory system, comprising:

a set of flash memory elements arranged in columns and rows using a set of bit lines and word lines, each flash memory element in a common column is connected to a common bit line, each flash memory element in a common row is connected to a common word line;

one or more write control circuits in communication with said set of flash memory elements, said one or more write control circuits simultaneously program flash memory elements connected to a particular word line on all of said set of bit lines; and

read circuits in communication with said bit lines to determine a quantity related to one of two or more adjacent flash memory elements along respective bit lines, said read circuits determine an offset for each flash memory element connected to said particular word line from a predetermined set of offsets based on a charge level stored in an adjacent flash memory element, said read circuits perform a set of read processes for said flash memory element connected to said particular word line, each read process uses a different one of said predetermined set of offsets, each of at least a subset of said flash memory elements connected to said particular word line provides final data from an appropriate one of said read processes associated with the offset determined for the respective flash memory element.

39. A flash memory system according to claim 38, wherein:

said set of flash memory elements comprise a block; and

said flash memory element connected to said particular word line store at least a first page of data.

40. A flash memory system according to claim 38, wherein:

there is at least one read process for each offset.

41. A flash memory system according to claim 38, wherein:

set of flash memory elements are NAND flash memory devices.

42. A flash memory system according to claim 38, wherein:

said set of flash memory elements are multi-state flash memory devices.