Schottky junction diode devices in CMOS with multiple wells

• US 20060223246A1
• Filed: 03/22/2006
• Published: 10/05/2006
• Est. Priority Date: 03/30/2005
• Status: Active Grant

• Current Assignee: Synopsys Incorporated
• Original Assignee: Impinj, Inc.
• Inventors: Oliver, Ronald A., Ma, Yanjun, Mavoori, Jaideep, Humes, Todd E.
• Granted Patent: US 8,759,937 B2
• Time in Patent Office: Days
• US Class Current: 438/167
• CPC Class Codes: H01L 27/0629 in combination with diodes, or resistors, or capacitors
• CPC Class Codes: H01L 27/0814 Diodes only
• CPC Class Codes: H01L 29/66143 Schottky diodes
• CPC Class Codes: H01L 29/872 Schottky diodes

Abstract

A Schottky junction diode device having improved performance and a multiple well structure is fabricated in a conventional CMOS process. A substrate including a material doped to a first conductivity type is formed. A first well is disposed over the substrate. The first well includes a material doped differently, such as to a second conductivity type opposite that of the first conductivity type. A second well is disposed within the first well. A region of metal-containing material is disposed in the second well to form a Schottky junction at an interface between the region of metal-containing material and the second well. In one embodiment, a second well contact is disposed in a portion of the second well.

Claims

1. A Schottky junction diode device comprising:

a substrate including a material doped in a first manner;

a first well disposed in the substrate, the first well including a material doped in a second manner different from the first manner;

a second well disposed in the first well, the second well including a material doped in a third manner different from said second manner;

a region of metal-containing material disposed in the second well to form a Schottky junction at an interface between the region of metal-containing material and the second well; and

a second well contact in electrical contact with the second well.

2. The device of claim 1, further comprising a first well contact in electrical contact with the first well.

3. The device of claim 1, further comprising:

a third well disposed in the substrate, the third well comprising a material doped in a fourth manner different from the first manner and from the second manner.

4. The device of claim 3, wherein the first well and the third well are not in direct contact with one another.

5. The device of claim 3, wherein a portion of the substrate is disposed between the first well and the third well.

6. The device of claim 3, further comprising:

a third well contact in electrical contact with the third well.

7. The device of claim 4, further comprising:

a third well contact in electrical contact with the third well.

8. The device of claim 5, further comprising:

a third well contact in electrical contact with the third well.

9. The device of claim 1, wherein the material doped in the first manner is doped to a first conductivity type and the material doped in the second manner is doped to a second conductivity type.

10. The device of claim 9, wherein the first conductivity type is p−

and the second conductivity type is n−

.

11. The device of claim 10, wherein the material doped in the third manner is doped to the first conductivity type.

12. The device of claim 11, wherein the material doped in the fourth manner is doped to the second conductivity type.

13. The device of claim 1, wherein the second well contact is formed in a closed loop shape which surrounds the Schottky junction.

14. The device of claim 13, wherein the closed loop shape is a rectangle.

15. The device of claim 2, wherein the first well contact is formed in a closed loop shape which surrounds the Schottky junction.

16. The device of claim 15, wherein the closed loop shape is a rectangle.

17. The device of claim 3, wherein the third well contact is formed in a closed loop shape which surrounds the Schottky junction.

18. The device of claim 17, wherein the closed loop shape is a rectangle.

19. The device of claim 1, wherein the substrate includes silicon.

20. The device of claim 1, wherein the substrate includes gallium arsenide.

21. The device of claim 1, wherein the region of metal-containing material comprises one or more of the materials selected from the group consisting of:

titanium, titanium silicide, cobalt, cobalt silicide, nickel, nickel silicide, tungsten, tungsten silicide, gold, manganese, hafnium, silver, aluminum, palladium and platinum.

22. A method for manufacturing a Schottky junction diode device comprising:

forming a substrate comprising a material doped in a first manner;

forming a first well disposed in the substrate, the first well including a material doped in a second manner different from the first manner;

forming a second well disposed in the first well, the second well including a material doped in a third manner different from the first manner;

forming a region of metal-containing material disposed in the second well to create a Schottky junction at an interface between the region of metal-containing material and the second well; and

forming a second well contact in electrical contact with the second well.

23. The method of claim 22, further comprising:

forming a first well contact in electrical contact with the first well.

24. The method of claim 22, further comprising:

forming a third well disposed in the substrate, the third well including a material doped in a fourth manner different from the first manner and the second manner.

25. The method of claim 24, wherein said forming a third well is carried out so that the first well and the third well are not in direct contact with one another.

26. The method of claim 24, wherein said forming a third well is carried out so that the first well and the third well are separated by a portion of substrate.

27. The method of claim 24, further comprising:

forming a third well contact in electrical contact with the third well.

28. The method of claim 25, further comprising:

forming a third well contact in electrical contact with the third well.

29. The method of claim 26, further comprising:

forming a third well contact in electrical contact with the third well.

30. The method of claim 22, wherein said forming a region of metal-containing material comprises utilizes one or more of the materials selected from the group consisting of:

titanium, titanium silicide, cobalt, cobalt silicide, nickel, nickel silicide, tungsten, tungsten silicide, gold, manganese, hafnium, silver, aluminum, palladium and platinum to form the metal-containing region.

31. The method of claim 22, wherein said forming a second well contact includes forming the second well contact in a closed loop shape on a surface of the second well surrounding the region of metal-containing material.

32. The method of claim 31, wherein the closed loop shape is a rectangle.

33. The method of claim 27, wherein said forming a third well contact includes forming the third well contact in a closed loop shape on a surface of the third well surrounding the region of metal-containing material.

34. The method of claim 33, wherein the closed loop shape is a rectangle.

35. The method of claim 28, wherein said forming a third well contact includes forming the third well contact in a closed loop shape on a surface of the third well surrounding the region of metal-containing material.

36. The method of claim 35, wherein the closed loop shape is a rectangle.

37. The method of claim 29, wherein said forming a third well contact includes forming the third well contact in a closed loop shape on a surface of the third well surrounding the region of metal-containing material.

38. The method of claim 37, wherein the closed loop shape is a rectangle.